• The reasons of DC offset and clock feed-through are analyzed, and pertaining solutions are brought out according to given application conditions.

    本文分析了直流失调电压以及时钟通现象产生原因并且结合具体应用条件提出有针对性的解决方案。

    youdao

  • The sample and hold circuit is employed by the bottom plate sampling technique, which could not only cancel the charge injection error but also eliminate the effect of clock feed-through.

    采样保持电路设计采用了电容极板采样技术不仅有效地避免电荷注入效应引起采样信号失真而且消除了时钟馈通效应的不良影响。

    youdao

  • The sample and hold circuit is employed by the bottom plate sampling technique, which could not only cancel the charge injection error but also eliminate the effect of clock feed-through.

    采样保持电路设计采用了电容极板采样技术不仅有效地避免电荷注入效应引起采样信号失真而且消除了时钟馈通效应的不良影响。

    youdao

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