Record hardware effects such as cache misses.
记录硬件的作用，比如缓冲失效。
This helps minimize page and cache misses during program execution.
这在程序执行期间帮助最小化页面和cache丢失。
When the page cache was moved into its own pool, the cache misses dropped about 50%.
当该页面缓存转移到其自己的池之后，缓存未命中降低了将近50%。
You should not rely on the data being in the cache and thus need to handle cache misses.
你不应依靠缓存数据，从而需要处理缓存的失误。
Using this function can generally result in better performance by minimizing cache misses and stalls.
使用这个函数通常可以减少缓存缺失和停顿，从而提高性能。
Note that the "cache misses" statistics are for static contents only (1.15% of all your HTTP requests).
请注意，“缓存未命中”的统计数据是静态的内容只有(你所有的HTTP请求1.15%)。
As a result, allocating an object on the heap will likely entail more cache misses than allocating that object on the stack.
所以，在堆上分配对象，比起在堆栈上分配对象，会带来更多缓存遗漏。
This is done to ensure that as much code as possible fits in the CPU's cache, as cache misses can have a significant impact on performance.
这样做就保证了尽可能多的代码能适合CPU的缓存，当缓存不够用时，就能对性能产生巨大的影响。
The static scheduling with "Interrupt Affinity" is adopted to balance the load among processors, and to reduce the cache misses due to .
为此，采用“中断亲和”的静态调度方法来均衡处理器负载，并降低调度引起的高速缓存命中失败率。
The use of escape analysis to eliminate some allocations results in even faster average allocation times, reduced memory footprint, and fewer cache misses.
用escape分析清除一些分配，会带来更快的平均分配时间，简化的内存工作，更少的缓存遗漏。
If you want to count a particular event when you use the profiler, for example, L2 cache misses, you can build a performance session around that event sender.
如果您在使用探查器时要对特定事件进行计数(例如l2缓存未命中数)，则可以围绕该事件发送方生成性能会话。
However you can raise the sample size to 10 at the cost of some additional CPU usage in order to closely approximate true LRU, and check if this makes a difference in your cache misses rate.
你可以提升样品大小配置到10，它将接近真正的LRU算法，并且有不同错过率，但是要消耗更多的CPU。
This information can let you know how much cached data is going into which region, including cache misses, cache hits, and cache updates. The example in Listing 13 shows how to gather this information
这个信息让您知道缓存有多少数据，它们会进入哪个区域，包括缓存丢失、缓存提示和缓存更新。
Statistics such as the cache size, used entries, cache hits and misses, and many more provide a good overview of their usage patterns.
诸如缓存大小、已使用的条目、缓存命中率和未命中率之类的统计数据以及更多的数据可以很好地概述缓存的使用模式。
The cache hit ratio tells you the percentage of times you are performing a get versus the number of times that get misses.
缓存命中率表示执行get的次数与错过get的次数的百分比。
The profiling table provides the percentage and number of samples collected for specified processor events such as the number of cache line misses, Transition Lookaside Buffer (TLB) misses, and so on.
评测表提供为特定的处理器事件收集的采样的百分数或数量，比如高速缓存线路故障的数量、传输后备缓存(TLB)故障的数量，等等。
The load table is used to manage cache 'hits' and 'misses' and to aid in the recycling of data from the L2 cache.
所述加载表用于管理高速缓存“命中”和“未命中”，并帮助从L2高速缓存回收数据。
The load table is used to manage cache 'hits' and 'misses' and to aid in the recycling of data from the L2 cache.
所述加载表用于管理高速缓存“命中”和“未命中”，并帮助从L2高速缓存回收数据。
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