Identify problems with memory, including low buffer pool hit ratios, catalog cache hit ratios, and package cache hit ratios.

识别内存问题，包括较低的缓冲池命中率、较低的目录缓存命中率和较低的包缓存命中率。

youdao

TLB cache entry reuse (cache hit) equates to quicker address translation and subsequently faster access to physical memory.

tlb缓存条目重用(缓存命中)意味着更快的地址转换，还意味着对物理内存的更快的访问。

youdao

Because workloads with high Symmetrix cache read-hit rates are serviced at memory access speed, storing the data needed on EFDs may not result in a significant increase in performance.

因为具有高symmetrix缓存读中率的工作负载都是以内存访问速度实现的，所以在EFD中存储所需要的数据可能不会对性能有大的改进。

youdao

Thus, a write-behind cache gives you memory speed for accessing data on all writes, and for all cache-hit reads, and has other benefits that you will see later.

因此，write - behind缓存在访问所有写入数据以及所有缓存命中读取时都能提供内存速度，而且还有一些其他好处，我们将在下文介绍。

youdao

If the data is there, then you have a cache hit and you get the item you want at memory speed (tens of a nanosecond).

如果存在数据，您就得到一次缓存命中(cache hit)，并以内存速度获取项(几十纳秒)。

youdao

If the data is there, then you have a cache hit and you get the item you want at memory speed (tens of a nanosecond).

如果存在数据，您就得到一次缓存命中(cache hit)，并以内存速度获取项(几十纳秒)。

youdao