The most obvious issue is that the interface in Listing 6 requires a JNI call for each bit set or retrieved, as well as a JNI call to read a byte from, or write a byte to, the serial port.
最显著的一个问题就是，清单6中的接口在设置或检索每个位，以及从串行端口读取字节或者向串行端口写入字节都需要一个JNI调用。
Serial number: A unique 32-bit non-zero positive number.
序号（Serialnumber）：一个惟一的32 位非零正数。
The multiplier in this paper is Bit-serial mode and the new hardware architecture is regular which reduces the delay of the critical path.
新的乘法器采用比特串行方式，使得硬件结构更加规则，减少了原有乘法器关键路径的延迟。
The implementation scheme of digital latch system with 7 bit serial code is discussed and tested. The obtained results show the structure of system designed by this method is simple and practical.
本文对7位串行码数字锁系统这一逻辑命题进行了实施方案的探讨和实验，证明用这种方法设计的系统结构简单实用。
The serial data stream from the DOUT pin has a channel identifier bit and a mode identifier bit, which provide information about the channel converted and the current mode of operation.
DOUT引脚的串行数据流有一个通道识别位和一个模式识别位，可提供所转换通道和当前工作模式的相关信息。
The new data process path in Baseband is constructed to optimize hardware resource when it is realized by the means of serial bit processing.
给出了新的蓝牙基带的数据处理路径结构，采用串行方式实现可优化硬件资源。
Baud: The rate at which data is received or transmitted in serial: one baud is one bit per second.
波特：连续接收和传输数据的速率；一波特定义为每秒一个比特。
After video information read by FPGA, serial video information is transformed into parallel format by Bit-Plane Separation technology first, and then sent to video cable.
在FPGA读取视频信息后，先用位面分层技术把串行视频信息转换为并行数据再送到视频电缆上。
This paper presents the design of extended interface in serial communication with 8n-bit binary number.
本文给出了8n位二进制数串行通讯扩展接口板的设计。
It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port.
它内置一个低功耗、高速、16位不失码的采样adc、一个内部转换时钟和一个多功能串行接口。
It contains a low power, high speed, 18-bit sampling ADC and a versatile serial interface port.
它内置一个低功耗、高速、18位采样adc和一个多功能串行接口端口。
Programming for setup and control is accomplished using a 3-bit SPI-compatible serial interface.
设置与控制的编程利用3位SPI兼容串行接口来完成。
The part contains a high-speed 18-bit samplingADC, an internal conversion clock, an internal reference buffer, error correction circuits, and both serial and parallel system interface ports.
该器件内置一个高速18位采样ADC、一个内部转换时钟、一个内部基准电压缓冲、纠错电路，以及串行和并行系统接口。
We introduced the application of a serial of self-made instruments such as electric knife bit, retractor, deep knotter in minicholecystectomy(MC).
介绍自制器械包括电刀头、宽头拉钩、深部打结器在小切口胆囊切除术的应用。
It contains a high speed 16-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and both serial and parallel system interface ports.
它内置一个16位高速采样adc、一个内部转换时钟、一个内部基准电压源(和缓冲)、纠错电路，以及串行和并行系统接口端口。
It contains a high speed 16-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and both serial and parallel system interface ports.
它内置一个16位高速采样adc、一个内部转换时钟、一个内部基准电压源(和缓冲)、纠错电路，以及串行和并行系统接口端口。
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