With the help of IC back-end tools, this generator could implement the checking and verifying of the generated test structures layout files.
生成器配合集成电路后端设计开发环境,可以对所生成的测试结构版图文件进行检查与验证。
With the help of IC back-end tools, this generator could implement the checking and verifying of the generated test structures layout files.
生成器配合集成电路后端设计开发环境,可以对所生成的测试结构版图文件进行检查与验证。
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