The verification of microprocessor design must ensure the correctness of arithmetic circuit.
微处理器电路设计的验证工作必须确保运算电路模块设计的正确性。
A performance evaluation and modeling method for synthesizable arithmetic circuit is proposed.
提出了一种可综合算术运算单元的性能评估与建模方法。
As the increase of circuit complexity, traditional simulation method has been unable to cover the total state space and the correctness of microprocessor arithmetic circuit cannot be ensured.
当电路复杂度达到一定规模后，传统的仿真验证方法已无法覆盖整个状态空间，从而无法保证像微处理器运算电路这类复杂设计的正确性。
As the increase of circuit complexity, traditional simulation method has been unable to cover the total state space and the correctness of microprocessor arithmetic circuit cannot be ensured.
当电路复杂度达到一定规模后，传统的仿真验证方法已无法覆盖整个状态空间，从而无法保证像微处理器运算电路这类复杂设计的正确性。
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