The timing requirements for PE structure and the adder array for adder tree structure to optimize performance of design are studied and used.
研究了并利用PE(处理单元)结构时序约束和加法树结构的加法阵列优化设计性能。
In order to deal with the significant digits addition we designed three inputs adder tree, and give a simple performance discuss of this method.
针对有效数相加问题，本文提出了三输入加法树的设计方法，并就其性能作了简要的分析。
We also describe the principle and possibilities of the all-optical prefix tree adder.
描述了该全光前缀树加法器的原理，说明了其实现的可能性。
The model can be extended for studying more complex all-optical circuits of enhanced functionality in which the prefix tree adder is the basic building block.
提出的模型可扩展，用于研究以全光前缀树加法器为基本构造模块的功能强大的复杂全光回路。
We propose and describe an all-optical prefix tree adder with the help of a terahertz optical asymmetric demultiplexer (TOAD) using a set of optical switches.
提出一种基于太赫兹光学非对称解复用器的全光前缀树加法器，在其中使用了多个光开关。
A 32-bit sparse tree adder with modified carry tree structure is proposed.
提出了一种改进进位运算的32位稀疏树加法器。
The prefix tree adder is useful in compound adder implementation. It is preferred over the ripple carry adder and the carry lookahead adder.
该加法器适用于复合型加法运算，优于脉动进位加法器和超前进位加法器。
The prefix tree adder is useful in compound adder implementation. It is preferred over the ripple carry adder and the carry lookahead adder.
该加法器适用于复合型加法运算，优于脉动进位加法器和超前进位加法器。
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