结合工程实践和大量应用文献总结出高速数字逻辑系统的设计方法，以及高速数字系统的性能测试方法。
Furthermore, the design rules of high-speed digital systems and their self-checking and testing techniques are summed up by combining the project experience and lots of application literature.
介绍了LED大屏幕扫描电路的设计方法，阐述了可编程逻辑器件在高速数字系统应用中的优点。
The design method of LED big screen scanning circuit is introduced, and the virtues of programmable logic device application on high-speed digital system are presented.
大规模可编程逻辑阵列（CPLD）的快速开发、在系统编程以及高速可靠的特点使得CPLD在数字系统的构建中起到越来越重要的作用。
The feature of rapidly develop, high speed and high reliability of Complex Program Logic Device(CPLD) makes CPLD playing a more and more role in the design of digital system.
该模块由高速前放电路，数字逻辑电路，强度调制器驱动电路，自动增益控制电路，以及强度调制器组成。
The module is made of high speed amplifier, AGC circuit, digital logical circuit, intensity modulator drive circuit, and intensity modulator.
该仪器以最新的片上系统芯片FPSLIC为核心处理器，以RTX51为嵌入式操作系统，采用大屏幕液晶显示，实现了多路高速数字信号的逻辑分析。
This instrument uses System on Chip FPSLIC as its core processor, RTX51 as embedded systems and large LCD as displaying, which can analyse many channels logic signals.
本文结合工程背景，运用逻辑平衡的思想对高速数字电路的设计及相关问题进行了全面的研究。
This dissertation focuses on the high performance digital circuits design and relative issues, using the concept of logic balance.
该模糊控制器电路不用cpu，全部算法由数字逻辑电路实现，具有运算速度快的特点，适合于需要高速控制的场合。
No CPU is needed for the fuzzy controller circuit. All algorithms are realized for high speed by digital logic circuits.
在此基础上，采用高速数字信号处理器、大规模可编程逻辑门阵列和实时软件进行系统设计，完成了原理样机的研制。
On this basis, the principle prototype is developed with high speed digital signal processor (DSP), the huge reprogrammable logic gate arrays (FPGA) and real-time software.
系统将数字逻辑和数据存储一起设计在了一片高速大容量的FPGA内，大大提高了系统的集成度、可靠性和灵活性。
By implementing all the digital logic function and data storage function with a FPGA, the instrument is greatly enhanced in integration, reliability and flexibility.
使用高性能的可编程逻辑器件（CPLD）实现高速数字电路的控制；
Use the high-performance programmable logic device (CPLD) to realize the control of the digital circuit at high speed;
使用高性能的可编程逻辑器件（CPLD）实现高速数字电路的控制；
Use the high-performance programmable logic device (CPLD) to realize the control of the digital circuit at high speed;
应用推荐