本文研究了高速数字电路的信号完整性问题。
This thesis focuses on si problems in high-speed digital circuit.
在高速数字电路中，信号完整性问题至关重要。
In the high speed digital circuit, signal integrity plays a key role.
可以说，当今高速数字电路设计的本质还是模拟电路设计。
Undoubtedly, the essence of current high-speed digital circuit designs is still the analog ones.
采用上述的端接技术可在高速数字电路中实现信号的完整性传输。
With the above technology we obtain signal integrity in the transmission of high speed digital circuits.
高速数字电路对电源分配系统的可靠性和复杂性提出了很高要求。
High speed digital circuits require higher reliability and lower complexity of power distribution system.
该系统的硬件模块是典型的高速数字电路，这是当今世界电路设计的一大热点。
The hardware unit is typical high speed digital circuit which is the current hot research point.
流水线技术是设计高速数字电路的一种最佳选择之一，对其实现原理作了较形象的阐述。
Pipeline technology is one of the optimum approaches to design high speed digital circuits. This paper sets forth the principle of its realization.
数字电路的高速化已是大势所趋，而高速数字电路的设计又给工程师带来了众多新问题。
The speed of digital circuit is becoming higher and higher, and this tendency brings the circuit designer many problems.
共模噪声是高速数字电路产生电磁干扰的主要原因，而共模电感又是共模噪声大小的决定因素。
Electromagnetic interference (EMI) in high-speed digital circuit is mainly generated by Common-mode (CM) noise, and the CM inductance is responsible for CM noise magnitude.
本文结合工程背景，运用逻辑平衡的思想对高速数字电路的设计及相关问题进行了全面的研究。
This dissertation focuses on the high performance digital circuits design and relative issues, using the concept of logic balance.
随着数据传输速率增高，其帧同步的实现就越来越困难，而该领域主要是应用高速数字电路技术。
It becomes more difficult to realize frame synchronization with higher data transfer speed, and this field applies mostly high-speed digital circuits technique.
信号完整性理论在高速数字电路设计中日益被重视，阻抗匹配在信号完整性理论中占有重要地位。
Signal integrity theory is gaining increasing attention in high speed digital circuit design impedance matching plays an important role.
本文还讨论了应用线性“与或”门设计超高速数字电路的准则以及有关的组合和时序电路设计实例。
The paper also discusses the design principle of super-high-speed digital circuits and some examples of combinational and sequential circuits using linear AND-OR gate are given.
这些问题的出现给系统硬件设计带来了更大的挑战，高速数字电路的信号完整性设计已经成为能否成功的主要因素。
These problems bring great challenges to the system hardware design, and designing high-speed digital circuit with good si performances has become the dominant factor of system design.
由于不匹配的电缆可引起过度的时钟相偏（Clock Skew），导致错误操作，所以相位匹配是有些高速数字电路中特别要注意的事项。
Phase matching is of particular concern with some high speed digital circuits, because unmatched cables may cause excessive clock skew, resulting in erroneous operation.
随着电子技术的飞速发展，高速数字电路设计在整个电子设计领域所占的比例越来越大，如何处理高速信号问题已经成为一个设计能否成功的关键。
With the rapid development of the electronic technology, high speed digital circuit design is larger and larger in proportion in whole electronic designing field.
RTD基集成电路所具有的超高速、低功耗和自锁存的特性，使其在数字电路、混合信号电路以及光电子系统中有着重要的应用。
RTD-based circuits have important applications in digital circuit, mixed signal circuit and optoelectronic system with the characteristics of ultra-high speed, low power and self-latching.
RTD基集成电路所具有的超高速、低功耗和自锁存的特性，使其在数字电路、混合信号电路以及光电子系统中有着重要的应用。
RTD-based circuits have important applications in digital circuit, mixed signal circuit and optoelectronic system with the characteristics of ultra-high speed, low power and self-latching.
应用推荐