介绍一种可用于语音处理的低功耗、高速率的抽取和内插数字滤波器的集成电路设计方法。
A low power, high speed design method of decimation and interpolation digital filters for audio signal processing is described.
在调节器输出，数字滤波器解决了高频噪声和高速采样率的问题。
At the modulator output, the digital filter addresses high-frequency noise and high-speed-sample-rate issues.
在调节器输出，数字滤波器解决了高频噪声和高速采样率的问题。
At the modulator output, the digital filter addresses high-frequency noise and high-speed-sample-rate issues.
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