数字频率计是一种基本的测量仪器。
The digital cymometer is a kind of basic measuring instrument.
频率计由时间闸门电路和计数器组成。
本项目是一款微波频率计的软件部分。
This project is the software part of a microwave frequency counter.
介绍了一种利用EDA技术设计的数字频率计。
This paper discusses the digital cymometer design principles by using EDA technology.
上面图片中可以看到频率计，和大木电表墙壁上。
In the picture above you can see the frequency meter, and the large wooden ammeter on the wall.
对于频率计的软件部分，是用汇编语言设计而成的。
The software part of the cymometer was designed in assembler language.
计数式频率计的选通门一般与被测信号是不相关的。
The strobe signal is not commonly associated with the signal tested.
实验表明，频率计吸收法是一种简单可靠的测试方法。
Experimental results indicate that frequency absorption is a simple but reliable testing method.
简述了基于FPGA/CPLD技术的数字频率计的总体设计。
This paper illustrates the general design of digital frequency meter based on FPGA/CPLD Technology.
数字频率计是直接用十进制数字显示被测信号频率的一种测量装置。
The digital frequency meter is a device which is one kind of using decimal system digital directly display the signal frequency.
声卡频率计源代码，为网上收集的。下载使用时，请尊重原创作者的版权。
Sound card frequency meter source code for on-line collection. when downloading use please respect.
实验四频率计实验要求：设计一个有效位为4位的十进制的数字频率计。
Experiment iv Cymometer experimental requirements: design of an effective place for the 4 decimal digital frequency meter.
该设计比以前老式的设计有较大改进，使数字频率计具有高精度和高速的特点。
There was greater improvement to it's time to design the design more outdated than before, made the digital cymometer have high accuracy and high-speed characteristic.
在数字电路中，数字频率计属于时序电路，它主要由具有记忆功能的触发器构成。
In the digital circuit, the digital frequency meter belongs to the sequence circuit, it mainly by has the memory function trigger constitution.
本仪器包括有频率计、电压表、电容表等多种仪表的功能，能对信号进行综合测量。
The research group of the paper design an integrated measure system based on SCM and CPLD.
本文介绍了一种同步测周期计数器的设计，并基于该计数器设计了一个高精度的数字频率计。
The design of a counter measuring synchronous period is introduced in this paper. And based on it, a high precision digital cymometer is designed.
在对转速和金属裂纹的数字检测中，我们应用pmos和CMOS组件设计了两种数字频率计。
In measuring the speed of rotation and the depth of metal crack, PMOSICs and CMOSICs were employed to design two kinds of digital frequency counters.
介绍了一种基于数字频率计原理，以at89 C5 1单片机为控制器件的新型频率测量方法。
A new method of frequency measurement based on the theory of digital frequency meter is presented. The MCU AT89C51 is used for the center controller.
数字频率计是近代电子技术领域的重要测量工具之一，同时也是其他许多领域广泛应用的测量仪器。
Digital cymometer is one of the important measurement tools in the field of modern electronic technology, it is also widely used in many other areas of the measuring instruments.
介绍了具有频率测量、脉冲周期测量、脉冲宽度测量以及脉冲信号占空比测量等功能的数字频率计。
It introduces a digital cymometer which has the functions of frequency measuring, pulse cycle measuring, pulse width measuring and pulse signal ratio measuring.
文章以等精度频率计为例引入单片机和CPLD结合设计电子系统的方法，并给出原理框图和仿真波形。
Tlus paper introduces a way to realize the equal accuracy frequency accounts with MCU and CPLD. and provides with the frame principle of frame as well as simulated wave.
该系统电路简洁，使用灵活，可以单独作为频率计使用，也可以嵌入到一些需要测量频率的系统中使用。
The circuit is succinct and the use is agility. The system can be used alone, also can be inserted in some application systems.
声卡示波器软件实现了示波器，信号发生器，频率计，万用表的功能，在音频范围内可完全替代上述仪器。
Sound card oscilloscope software oscilloscope, signal generator, frequency meter, multimeter functions in the audio range can completely replace the equipment.
该数字频率计达到预期要求，实现了可变量程测量，测量范围0.1Hz—9999MHz，精度可达0。
The digital frequency meter to achieve the desired requirements of the variable-range measurement, measuring range 0.1Hz-9999MHz, accuracy up to 0.1Hz.
本文提出的用基于AT 89 C51单片机设计频率计的方法可获得精度较高、频率范围宽的频率计。
This article proposes with designs frequency meter's method based on at89C51 monolithic integrated circuit to be possible to obtain the precision to be high, the frequency range wide frequency meter.
根据等精度测频原理，本设计克服了基于传统测频原理的频率计的测量精度随被测信号频率的下降而降低的缺点。
Based on equal precision frequency principle, this design avoids traditional cymometer's defect that precision declines as the frequency measured declines.
用CPLD作频率计数字电路的核心部件，可简化频率计的硬件电路，提高系统的工作速度，节约设计与制造成本。
Using CPLD as the core of the circuit, it can simplify the hardware circuit, improve operational speed and save production cost.
用CPLD作频率计数字电路的核心部件，可简化频率计的硬件电路，提高系统的工作速度，节约设计与制造成本。
Using CPLD as the core of the circuit, it can simplify the hardware circuit, improve operational speed and save production cost.
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