给出了在一种安全处理器(SSX11- 140)中有效缩减AES算法硬件实现面积的设计方案。

This paper proposes a novel efficient area reduction solution for hardware implementation of the advanced encryption standard (AES) algorithm which works in SSX11-140 secure processor architecture.

youdao

给出了在一种安全处理器(SSX11- 140)中有效缩减AES算法硬件实现面积的设计方案。

This paper proposes a novel efficient area reduction solution for hardware implementation of the advanced encryption standard (AES) algorithm which works in SSX11-140 secure processor architecture.

youdao