规范逻辑近半个世纪正在从静态逻辑走向动态逻辑。
Normal logic has been moving forward towards dynamic logic from static...
规范逻辑近半个世纪正在从静态逻辑走向动态逻辑。
Normal logic has been moving forward towards dynamic logic from static logic in the last 50 years.
之后，针对平台的核心业务子系统，进行了详细的软件静态逻辑设计、软件动态逻辑设计和数据库设计。
Later, we do detailed design including software static logical design, software dynamic logical design and database design. Now the platform has been delivered and running online.
根据您的mvc模式，实现情况会有所不同，但决定如何同时访问静态和动态服务的逻辑是一样的。
Your implementation will differ, depending on own your MVC pattern, but the logic determining how you access static and dynamic services at the same time will remain the same.
每个约束(不只实现了验证逻辑)描述了它如何能投映到一组预定义的静态约束范围内。
Each constraint (beyond implementing the validation logic), describes how it can be projected on a set of predefined static constraint dimensions.
逻辑视图处理静态设计模型。
下面是静态客户机的一些逻辑。
过去两年中我们公司(WeAre Mammoth)已经使用X2O开发了很多东西，从只有静态内容的简单站点到包含很多业务逻辑的拥有大量数据的交互式应用。
At my company, we Are Mammoth, we've used X2O for the last two years developing everything from microsites with static content to data-heavy interactive applications with a lot of business logic.
定制确认器可以包含具体的逻辑，以通过API检查拓扑的元素，例如validatorutils类的静态方法。
Custom validators can contain detailed logic to examine the elements of a topology through the API, such as the static methods of the ValidatorUtils class.
使用标准消息流操作逻辑，该树位置处的值可以静态地定义、根据消息内容计算得出，或者从外部来源得出。
Using standard message flow manipulation logic, the value at the tree location could be defined statically, computed from message content, or even derived from an external source.
因为大多数for循环处理的复杂逻辑不允许静态地确定迭代次数，因此您不会经常使用这种格式的括号表示。
Because most for loops deal with complicated logic that does not allow the number of iterations to be statically determined, you will not often employ this form of bracket notation.
静态的考察是考察胡塞尔的新意向性概念在直观概念中的应用，新的直观概念产生在《逻辑研究》之中。
The static investigation is to study the application of that new concept of intentionality. The new concept of intuition came into being in logical investigation.
通常的逻辑只涉及静态否定的概念。
类似的逻辑也适用于静态方法。
对机器人静态避障采用了基于模糊逻辑的控制算法，并通过实验验证了该算法的可行性。
The robot has used the fuzzy logic control algorithm to static obstacle avoidance, and through experimental verification this algorithm feasibility.
本文描述了采用静态数据分析实现逻辑程序“与”并行的方法。
This paper presents a method to execute logic programs in AND - parallelism based on static data analysis.
本文采用历史与逻辑相统一、理论归纳与实际浅析浅析相联系、静态描摹和动态浅析浅析相结合的研究策略。
This paper has applied the combined analysis method of the history and logic, theory and practice of inductive link, static and dynamic analysis depicting.
当你有更复杂的逻辑来初始化静态成员变量时，请创建静态构造函数。
When you have more complicated logic to initialize static member variables, create a static constructor.
介绍了DEH的主要特点，分析了控制的主要逻辑，进而深入探讨了DEH的静态和动态特性。
It introduces the main characteristic and analyzes the main logic of DEH, studies the stationary and dynamic characteristic.
但模糊逻辑解决的是一些静态的概念，对于动态的描述，则无法建模处理。
However, fuzzy logic is only to represent static concepts. It can not deal with the dynamic modeling.
电路采用源极耦合场效应管逻辑（SCFL），与静态CMOS逻辑相比具有更高的速度。
SCFL circuits are used because of the higher speed compared to static CMOS.
首先，文章讨论了静态时序分析中的伪路径问题以及路径敏化算法，分析了影响逻辑门和互连线延时的因素。
Firstly, false paths in static timing analysis and the algorithm to sensitize paths are presented, and then some factors affecting gates and interconnects delay are discussed.
动态分析与静态分析相结合的分析方法，本文通过大量的资料、数据和逻辑推理动态地分析问题，避免了纯粹静态研究的缺点与固有的局限性。
Through integration of dynamic analysis and static analysis, the paper cites a lot of materials, data to dynamically analyze problems, avoiding limitations of simple static analysis.
负责带领整个团队实施芯片的综合、静态时序分析、逻辑一致性分析、后仿真、DFT、ATE、功耗控制。从芯片实现的角度对模块的RTL代码和芯片的RTL代码进行把关。
Lead ASIC frond-end design team to complete Synthesis, STA, Equivelant Check, Post Layout Simulation, DFT, ATE, Power Control. Make sure RTL code is ok for chip implement.
负责带领整个团队实施芯片的综合、静态时序分析、逻辑一致性分析、后仿真、DFT、ATE、功耗控制。从芯片实现的角度对模块的RTL代码和芯片的RTL代码进行把关。
Lead ASIC frond-end design team to complete Synthesis, STA, Equivelant Check, Post Layout Simulation, DFT, ATE, Power Control. Make sure RTL code is ok for chip implement.
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