随着集成电路设计的规模变得越来越大、功能越来越复杂，功能验证已经成为设计流程的主要瓶颈。

Since integrated circuit designs are becoming more and more complex, functional validation has been the main bottleneck of the design flow.

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本论文基本体现了集成电路设计的完整流程。

This thesis gives the full IC design flow.

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让学员掌握集成电路设计基础知识的同时，能够实际体验模拟与数字集成电路设计的流程，有助于提高解决问题的能力。

The purpose is to let students participate to flow of mixed-signal IC design in personally and improve their ability, other than to learn only some essential knowledge.

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懂得集成电路设计的整个开发流程；

Understand the entire development flow of IC design;

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懂得集成电路设计的整个开发流程；

Understand the entire development flow of IC design;

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