锁相环电路，相移方法，及集成电路芯片。
Phase-locking loop circuit, phase shifting method, and IC chip.
提供在电路板等上安装集成电路芯片的封装。
A package for mounting an integrated circuit chip to a circuit board or the like is provided.
本文介绍了一种集成电路芯片图像矢量化技术。
This paper describes a set of techniques for extracting the patterns from silicon chip images.
所述方法也提供具有厚度、宽度和长度的集成电路芯片。
The method also provides an integrated circuit chip with a thickness, a width and a length.
VLSI集成电路芯片测试技术正在向高层次测试推进。
The VLSI testing is being pushed to the high-level based technology.
在世界半导体集成电路芯片生产领域，美日两国竞争激烈。
In the area of world semiconductor industry there has been a fierce competition between the United States and Japan.
提供了用一片大规模集成电路芯片HEF4752V产生PWM波的方法。
The method of using a large scale IC—HEF4752V to get PWM pulses is also presented.
整个芯片大约有九百个管位，是一块小规模的数模混合专用集成电路芯片。
The whole chip includes about 900 transistors and is a mixed small scale application specific integrated circuit chip.
分析结果表明，该方法很适合高速集成电路芯片内互连线的计算机辅助分析。
The results show that this method is very fit for the computer aided analysis of on chip interconnects for the high speed VLSI.
并且目前各大公司生产的超大规模集成电路芯片基本全部具有边界扫描结构。
Grand scale IC chip that every important company produces at present is almost all having the boundary scan structure.
趋势是将系统的存储器阵列和控制器电路一起集成在一个或一个以上集成电路芯片上。
The trend is to integrate the memory arrays and controller circuits of a system together on one or more integrated circuit chips.
方法取常用的塑封集成电路芯片制成粉末样品，测量其光激发光信号对辐射剂量的响应。
Methods IC chips powder samples were prepared, and the OSL curves and their dose response and stability were measured.
讨论了在检测半导体器件和集成电路芯片时，不同研磨倾斜角度对扩展电阻量值的影响。
The effects of choosing lapping bevel Angle during testing semiconductor devices and LSI chips by spreading resistance technique on measurement accuracy have been investigated in this paper.
该宽带复接芯片是一种高性能、低成本、支持网络协议(IP或者atm)集成电路芯片。
Broadband Multi-access chip, which supports IP or ATM protocol, is an integrated circuit of high performance and low cost.
脉宽调制器芯片是东北微电子所(47所)研制的一块集成电路芯片，课题是在该研究所完成的。
The chip is an integrated circuit chip which is researched by Northeastern Microelectronics research Institute (47 Institute). This article is completed in the Institute.
本文应用机器视觉和机械自动化技术，研制自动检测设备，实现集成电路芯片管脚尺寸检测自动化。
In this paper, we develop an automated inspection device by computer vision and mechanical automatization technology, to realize the automated inspection on integrated circuit chip pin size.
因此研究开发基于PCI总线接口和通信协议的超大规模集成电路芯片是具有应用前景和市场价值的。
Therefore, it will have a bright future to develop VLSI chip based on a PCI bus and related a communication protocol.
所述方法包括以沿垂直于所述结构长度的方向的方式从所述厚度 的部分去除一所述集成电路芯片的薄片。
The method comprises a step of removing a thin slice of the integrated circuit chip from part of the thickness along the direction vertical to the structure length.
具体介绍几种电路结构形式，并分析它们的工作原理、影响精度的主要因素以及有关集成电路芯片的选择。
It introduces some forms of circuits and analyses their working principles, effecting accuracy factors, and how to choose integrated circuit chips.
本实用新型提供一种新型集成电路卡，包括集成电路芯片，其特 征在于，还包括显示装置以及输入装置。
The utility model provides a novel integrated circuit card, which comprises an integrated circuit chip, and is characterized by also comprising a display device and an input device.
该SOI高压功率集成电路芯片的实现，为进一步实现实用化的SOI高压驱动电路提供了有力的实验验证。
The realization of the SOI HVIC chip offers sound experimental evidence to a further step of applying the SOI HVIC into practice.
集成电路芯片的规模不断增大，功能越来越复杂，设计验证工作量也越来越大，成为整个设计周期的“瓶颈”。
The function verification of integrated circuits has become the bottleneck of the design cycle because of the increasing scale and the complexity of chips.
本文首次利用时域有限差分(FDTD)法分析了高速集成电路芯片内半导体基片上的有耗互连传输线的电特性。
A full wave analysis of lossy interconnection lines on doped semiconductor substrates in high speed integrated circuits is carried out by means of a finite difference time domain (FDTD) approach.
在一个实施例中，架构事件通常可以指在与处理器相同的集成电路芯片上呈现的处理资源或其他逻辑内出现的事件或条件。
In an embodiment, an architectural event may generally refer to an event or condition that occurs within processing resources or other logic present on the same integrated circuit chip as a processor.
一种自供电低功耗集成电路芯片，其特征在于，该芯片包括一个半导体衬底以及在该衬底上的低功耗集成电路和太阳能电池；
The invention belongs to the technical field of integrated circuits, in particular to a self-powered low power consumption integrated circuit chip and a preparation method thereof.
椭圆曲线密码(ECC)是一种非常复杂的数学算法，设计出能够完整实现ECC算法的专用集成电路芯片(ASIC)非常困难。
Elliptic Curve Cryptography (ECC) is a rather complicated algorithm. It is difficult to design an application specific integrated circuit (ASIC) to fully implement ECC.
差分功率分析（DPA）方法可有效地对加密的集成电路芯片进行攻击解密，它绕过了加解密算法繁琐的数学分析，从而获取密码和信息。
The method of DPA may attack on encrypted FPGA effectively, which does not need complex analysis to encryption arithmetic and obtains ciphertext and information.
研究者们从一个数量近五千的流感基因序列库着手，采用数据挖掘的处理方法从55个流感RNA序列中筛选出应用于流感集成电路芯片的探针。
Beginning with a pool of nearly 5,000 flu gene sequences, the investigators used the data mining process to select 55 flu RNA sequences for use as probes on the FluChip.
本论文的主要任务就是以通用的调频通信集成电路芯片为平台设计出一个用于语音通信的低成本无线收发模块，最后还要完成电路参数指标的自动测试。
The mission of this project is to design a low-cost wireless transceiver be used voice communication base on the general chip, and finally complete the automatic test for this.
本论文的主要任务就是以通用的调频通信集成电路芯片为平台设计出一个用于语音通信的低成本无线收发模块，最后还要完成电路参数指标的自动测试。
The mission of this project is to design a low-cost wireless transceiver be used voice communication base on the general chip, and finally complete the automatic test for this.
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