本文设计了模拟集成电路版图设计自动化工具的流程。
In this dissertation, we designed the architecture and the workflow of the analog VLSI layout automation tool.
最后我们给出了模拟集成电路版图设计的要点并完成了CID电路各部分的版图设计。
At last we introduce the principle of analog integrated circuit layout design and the layout of CID.
而集成电路的后端设计包括了版图设计和验证，它们不在本论文的讨论范围之内。
The back-end design includes layout design and verification, but they will not be discussed in this paper.
本文评述了现有模拟集成电路设计自动化技术的主要方法：拓扑综合，器件尺寸优化和版图综合技术。
Kernel subjects and achievements in topology selection, device sizing, and layout synthesis are reviewed in this paper.
过滤器逻辑结构的模块化特别适宜用标准单元法来实现ASIC(专用集成电路)的版图设计。
The modularization of filter logical architecture is especially suitable for layout design of ASIC with standard cell.
一种寄生参数提取工具专用的版图数据库格式，属于集成电路计算机辅助设计技术领域。
A dominion database format that is specially used in parasitic parameter extraction tools belongs to the technical field of IC CAD.
生成器配合集成电路后端设计开发环境，可以对所生成的测试结构版图文件进行检查与验证。
With the help of IC back-end tools, this generator could implement the checking and verifying of the generated test structures layout files.
生成器配合集成电路后端设计开发环境，可以对所生成的测试结构版图文件进行检查与验证。
With the help of IC back-end tools, this generator could implement the checking and verifying of the generated test structures layout files.
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