面阵列封装对返工和修理提出了特殊的工艺要求。
Area arrays present special process considerations when rework and repair is required.
介绍了激光重熔在面阵列封装钎料凸点成形中的研究进展，并且对PBGA共晶钎料球激光重熔进行了工艺研究。
Research status of laser reflow on solder bump forming of area array packages are introduced, and experimental analysis on laser reflow of PBGA solder ball is performed.
本研究以计算流体力学的方法，对电子构装产品的明日之星- - -球栅阵列封装方式，来进行详细的热传分析。
In this study, the computational fluid dynamics approach is employed to analyze the heat transfer for ball grid array package that is popular in modern electronic industry.
可用作每个封装一到六个或更多阵列。
They are available in arrays of one to six or more per package.
建立了一种大功率LED的封装结构，二次光学设计采用了微透镜阵列技术，运用光线追踪法研究了这种封装结构的光学性能。
A packaging structure of high-power LED was presented, microlens array was employed in the secondary optical design, optical properties of the package was studied using Trace pro.
本文介绍了用于高速光电组件的表面安装型焊球阵列（BGA）封装技术。
Surface mount BGA Packaging Technology for high-speed Optoelectronic modules is described in this paper.
为了研制低功耗气体传感器，在传感器阵列上表面制备完成后，从下表面腐蚀传感器芯片的基底，以造成传感器芯片和封装室之间形成一个空气夹层。
To research the power consumption of gas sensors, often the front-side of the sensor array has fabricated, the back-side of the sensor is etched to form an air gap between substrate and housing.
本文介绍了我们最近开发的真空微电子平板数码管工艺，主要包括阳极支柱（阵列）的制作和平板透明真空封装。
The process developed recently for vacuum microelectronic flat-panel nixie is introduced, including mainly how to fabricate the anode pillars(array)and the transparent flat-panel vacuum packages.
在大规模集成芯片中以BGA(球栅阵列)封装的IC芯片被广泛使用。
In large scale integrated chip field, the IC of BGA encapsulation was widely used.
该模拟结果对大功率半导体激光器阵列的封装设计具有现实的指导意义。
The simulation results can guide the packaging of the high power semiconductor laser array.
为了预测跌落碰撞下球栅阵列(BGA)封装中无铅焊点的失效，采用ABAQUS软件来模拟跌落碰撞过程中焊点的应力分布。
In order to predict failure location of BGA lead-free solder joints under a drop impact, ABAQUS software is used to analysis stress distribution of the solder joints.
在圆片规模上开始加工，结束于芯片规模的圆片级封装技术将在面型阵列倒装芯片的封装中得到日益广泛的应用。
The WLP technology that initiates processing from Wafer-Level and finishes in chip scale will be applicable on a daily broadening scale in plane array FCP.
在圆片规模上开始加工，结束于芯片规模的圆片级封装技术将在面型阵列倒装芯片的封装中得到日益广泛的应用。
The WLP technology that initiates processing from Wafer-Level and finishes in chip scale will be applicable on a daily broadening scale in plane array FCP.
应用推荐