介绍了锁相环(PLL)技术和直接数字式频率合成(DDS)技术的基本工作原理，给出了一种提高DDS输出频率精度及减小其相位截断误差的方法。
This paper introduces the theory of the phase-locked loop (PLL) and the direct digital synthesis (DDS), a method to improve the precision of DDS and reduce its phase truncation error is also given.
采用高精度的直接数字频率合成（DDS）和数字锁相环技术，实现了高频率跟踪精度。
DDS and digital phrase-lock technology have been applied in FPGA to improve the accuracy of frequency tracking.
利用锁相环的倍频、分频等频率合成技术，可以获得多频率、高稳定的振荡信号输出。
Using PLL synthesis technology such as frequency multiplication and frequency division, may obtain the multi-frequencies, the high stable oscillator signal output.
利用锁相环的倍频、分频等频率合成技术，可以获得多频率、高稳定的振荡信号输出。
Using PLL synthesis technology such as frequency multiplication and frequency division, may obtain the multi-frequencies, the high stable oscillator signal output.
应用推荐