RTD基集成电路所具有的超高速、低功耗和自锁存的特性，使其在数字电路、混合信号电路以及光电子系统中有着重要的应用。
RTD-based circuits have important applications in digital circuit, mixed signal circuit and optoelectronic system with the characteristics of ultra-high speed, low power and self-latching.
缓冲区的获取是通过使用锁存器（latch）和锁访问信息来管理的，该锁存器称作 mutex。
Buffer acquisition is managed through the use of latches, known as mutex, and lock-access information.
发生这一问题的原因在于数据库内的索引锁定或锁存(例如事务处理日志周围的索引锁定或锁存)，直到该应用程序使用分区数据库为止。
This happens because the index locks or latches within the database (such as those surrounding the transaction log) until the application is using a partitioned database.
“点击”的声音可以表明您的宝宝是没有妥善锁存，并可能无法获得足够的牛奶从你。
The "clicking" sound can indicate that your baby is not properly latched on and may not be getting enough milk from you.
在一个数据锁存如果LE是低，时钟是在高或低的逻辑电平举行。
The a data is latched if le is low and clock is held at a high or low logic level.
尽管期望这种集成电路作为一种锁存器电路，它也可以当作推荐的标准触发器。
Even though this IC is supposed to work as a latch circuit, it can also be made to function as RS (recommended standard) flip-flop.
尽管期望这种集成电路作为一种锁存器电路，它也可以当作推荐的标准触发器。
Even though this IC (integrated circuit) is supposed to work as a latch circuit, it can also be made to function as RS (recommended standard) flip-flop.
这枪有一个杂志的追随者哈里斯型杂志与外部锁存运动，控制。
This rifle has a Harris-type magazine with external latch, which controlled the movement of the magazine follower.
我的天！我忘了锁存物箱了。
这样做的目的在于防止在空闲或者等待状态中锁存进了不想要的指令。当前执行的操作不受影响。
This prevents unwanted commands from being registered during idle or wait states. Operations already in progress are not affected.
双回转机构的步进电机控制电路由TDA1521音频集成功率放大器组成平衡桥式功率驱动电路，由计算机并行口经过锁存器构成脉冲分配器。
To control stepping motors, the balance bridge power drive circuit is made up by TDA1521 integrated audio power amplifier, the pulse allotter is made up by the parallel ports of computer and latches.
比较器是前置放大器与动态锁存器组成的开关电容电路。
It is a switch capacitor circuit which consists of the preamplifier and dynamic latch.
一种用于确定存储在PROM中数据的完整性的方法和设备，其中PROM配置了至少一个连接到两组块的保持锁存器。
A method and apparatus for determining the integrity of data stored in a PROM device provides at least one holding latch connected to two sets of blocks.
用两次锁存法可巧妙地提取有孔洞缺陷时的板宽值。
The value of width can be acquired ingeniously by using duplex latch mode while there is a hole defect in the steel plate.
介绍一种串行扫描方式静态锁存显示的电路、程序流程和工作时序。
Introduces the circuit, program flow and operation sequence of the serial-scan mode static locking display.
SP505还包括一个带有驱动器和接收器地址译码器的锁存使能管脚。
The SP505 also includes a latch enable pin with the driver and receiver address decoder.
该系统采用了片同步技术实现了采样后高速数字信号的可靠锁存，采用高精度的时钟管理芯片和设计合理的时钟路径对时钟抖动做了严格控制。
The Chip-Sync technology has been used to ensure the latch of high-speed signal, and we use high accuracy clock management chips and design reasonable clock way to strict control the clock jitter.
它的功能是当感应到输入电压界限时提供一个锁存开关，通过外部时钟信号完成复位。
Its function is to provide a latching switch action upon sensing an input threshold voltage, with reset accomplished by an external clock signal.
文章对串入并锁存驱动器74hc595，串口通信sn 75 LB 184芯片、软件结构的实现做了介绍，最后简单介绍了系统的干扰问题。
There have introduced 74hc595 and SN75LB184 chip, and analyzed. The implementing of software structure. In the end, systemic interfere issue is introduced simply.
此设置的唯一问题是我们需要8个IO口来控制每个锁存器的CP线。
The only problem with this setup is that we need 8 IO lines to control the CP line for each latch.
对灰色加密理论中的多用户双锁加密系统进行了改进，提出了一种基于多用户双锁加密系统的密钥分存方案。
The multiuser both-lock encryption system of grey encryption theory is improved and a secret sharing scheme based on both-lock encryption system is put forward.
利用乒乓锁存降低了对缓存速度的要求并将数据合并成32位，易于与DSP数据传输。
The buffer velocity is fell by using PingPong latch which combine data into 32 bits being easy to connect with DSP.
文中主要讨论常用时序逻辑模型(D锁存器、D触发器和T触发器)的建立。
This article mainly discusses the building of such sequence logic models as D_latch, D_FF and T_FF.
对控温信号采用了锁存技术，可以消除电机起动与停止导致电网波动所引起的采样误差。
By using signal latching technique on temperature contrcller, the measurement error caused by electric network fluctuation induced by start-up and shut-off motor can be eliminated.
通过对原有PFD电路结构进行重新设计，在传统D触发器PFD的基础上提出了两种新型PFD：传输门D触发器型PFD和基于锁存器的PFD。
Through redesigning the structure of the original PFD circuit and based on the traditional D trigger PFD, two new PFDs, transmission gate D trigger PFD and flip-latch based PFD were proposed.
同时，为了解决高速数据存储的失误问题，提出了二次锁存方案。
To solve the problem of storing data falsely, a scheme of a double pulse-latching scheme is presented.
译码电路接收测量端模拟信号，转化为7段显示的数字信号，发送到数据锁存器上。
The A/D decoding circuit received simulation signal form measurement port and converted the signals into data signals which displayed by 7-segment, then signals were sent to data latch.
同时，合并两个锁存器的跟踪差分对可以减小分频器的功耗。
The power of divider can be declined by means of combination of the trace differential pairs of these two latches.
为了克服现有等价性验证技术中难以精确匹配锁存器的局限性，提出了一种结合多种方法的新型锁存器匹配算法。
A novel latch mapping technique for equivalence checking was proposed to overcome the limit of low accuracy of previous mapping methods.
阈值检测器就是一种回差范围较大的锁存电路，与施密特触发器相似。
The threshold detector is similar to a Schmitt Trigger in that it is a latch circuit with a large dead zone.
应用推荐