该芯片的判决电路采用SCFL(源级耦合晶体管逻辑)的D触发器结构，根据矢量叠加原理设计，采用差动电流放大器构成可调移相器。
The decision circuit of the chip is applied with a DFF using SCFL structure and its tuned phase shifter with differential current amplifiers according to the principle of vector addition.
此设计在结构上属于跨阻抗放大器，采用全差动电路的形式构建完成。
This design is a transimpedance amplifier and it is constructed following the difference rule.
此外，为消除各种干扰信号，前置放大器采用差动放大方式来检测次级端上的信号变化。
Additionally, the head amplifier adopts a differential amplification mode to test the change of the signals on the secondary end for eliminating various interfering signals.
此外，为消除各种干扰信号，前置放大器采用差动放大方式来检测次级端上的信号变化。
Additionally, the head amplifier adopts a differential amplification mode to test the change of the signals on the secondary end for eliminating various interfering signals.
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