该仪器以最新的片上系统芯片FPSLIC为核心处理器,以RTX51为嵌入式操作系统,采用大屏幕液晶显示,实现了多路高速数字信号的逻辑分析。
This instrument uses System on Chip FPSLIC as its core processor, RTX51 as embedded systems and large LCD as displaying, which can analyse many channels logic signals.
用数字信号处理器(dsp)和复杂可编程逻辑器件(CPLD)设计了IGBT感应加热电源控制系统。
The control system of IGBT induction heating power supply is designed based on DSP (digital signal processor) and CPLD (complex programmable logic device).
其控制主体采用DSP(数字信号处理器)结合CPLD(复杂可编程逻辑器件)。
The control mainframe of the robot is composed of a Digital Signal Processor(DSP) and a Complex Programmable Logic Device(CPLD).
数字信号处理器包含了中央算术逻辑单元、乘法器单元、移位器单元、排序器单元、辅助寄存器单元、中断单元的设计。
The digit signal processor embodies the center arithmetic logic unit, Multiplier unit, Shifter unit, Sequencing unit, Auxiliary register unit, interception unit.
在此基础上,采用高速数字信号处理器、大规模可编程逻辑门阵列和实时软件进行系统设计,完成了原理样机的研制。
On this basis, the principle prototype is developed with high speed digital signal processor (DSP), the huge reprogrammable logic gate arrays (FPGA) and real-time software.
最后对用于实现信号多场累积和象差处理的帧处理器及其逻辑控制电路作了简要说明。
Finally, the frame processor used for carrying out multiple-field cumulation and image-difference processing and its logical control circuits are briefly treated.
针对数字信号处理器与其他微处理器的不同之处,文中着重介绍了等待状态发生逻辑电路及数字信号处理器与外部芯片的数据接口电路。
In view of the disparity among DSP and other microprocessors, the logic circuit in waiting requisition and the data exchanging interface among DSP and external chips is offered.
测试系统中采用了以数字信号处理器为核心,以复杂可编程逻辑器件为外围电路,来控制执行部件和测试与接收由外部返回的数字信号、模拟信号和开关信号。
Testing system, in which DSP is the part of core and CPLD is as peripheral circuit, controls operation parts, and test or incept the digital signal, analog signals and switch signals from exterior.
离散逻辑、微处理器和微控制器可以很容易使用控制方案的数字部分,例如:限制开关、按钮和信号灯。
Discrete logic, microprocessors, and microcontrollers easily cover the digital portions of control schemes, such as limit switches, pushbuttons, and signal lights.
根据单元级联多电平变换器拓扑结构及其脉宽调制技术的特点,以数字信号处理器和复杂可编程逻辑器件为核心,设计了多电平变换器的控制器。
On the basis of topology of cascaded multilevel convertor and its PWM technique, designed the controller of multilevel convertor at the core of DSP and CPLD.
根据单元级联多电平变换器拓扑结构及其脉宽调制技术的特点,以数字信号处理器和复杂可编程逻辑器件为核心,设计了多电平变换器的控制器。
On the basis of topology of cascaded multilevel convertor and its PWM technique, designed the controller of multilevel convertor at the core of DSP and CPLD.
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