本文主要针对SOC中的连线模型以及从连线设计角度对版图设计中的时延、功耗以及设计方法进行研究。
In this thesis, the interconnect model in the SOC design, and the delay, power and design method for layout design are investigated from the perspective of interconnect design.
连线:对于过去十年中设计的变迁你有何看法?
Wired: How has your thinking about design changed over the past decades?
连线:以你的经验来看,最好的设计流程是怎样的?
Wired: In your experience, what's the best process for design?
连线:你是一位苹果用户。从苹果产品的设计中你学到了什么?
Wired: you're a Mac user. What have you learned from the design of Apple products?
连线:对刚从事工业设计和软件架构的年轻人,你有何建议?
Wired: Do you have any advice for young industrial designers and software architects?
目前最著名的杂志要算《连线(Wired)》了,该杂志就是以设计著称的。
Probably the most successful tech magazine of this era is Wired, which is renowned for its design.
之所以《连线》和《纽约客》能够那样做是因为设计师们对Adobe的制作工具非常熟悉。
With WIRED and The New Yorker we were able to do that because designers were familiar with Adobe's creative tools.
深亚微米集成电路的互连线延迟是设计中需十分重视并必须解决的问题。
Interconnect wire delay is a very important question that must to be resolved in deep submicron IC design.
论述了一种自动化节水灌溉控制系统的硬件设计、外部连线及其使用功能。
The hardware design, outside connection and the utilization functions of an automatic water-saving irrigation control system is introduced in detail in this paper.
在本论文中应用逻辑编程对GAL进行设计,管脚可灵活定义,使电路结构紧凑,连线简单。
I use logical program to design GAL in this dissertation, the pin can defined agility, this made the structure of circuit compactly and connect simply.
平面上的最短连线问题在交通运输、道路建设、VLSI设计中有广泛的应用。
The problem on the shortest connection in the plane is used widely, such as the transportations, the construction of road system, the design of VLSI, etc.
超深亚微米ic设计中互连线的串扰情况与详细布线方案和信号波形密切相关。
In IC design under VDSM technology, the crosstalk situation of interconnecting is related nearly with the scheme of detailed routing and the waveforms of signals.
可依使用者需求及设计之生产线连线配合使用。
Design as per user's requests or connect with their production line.
提出了一种层次式布线资源FPGA连线开关的设计方法,采用迷宫算法,对连线开关的结构进行了分析。
A method to design connection switch for FPGA of the hierarchical interconnection resource is presented. Maze routing algorithm has been used to analyze the architecture of connection switch.
硅片上互连线几何变异提取对于超深亚微米工艺节点下集成电路可制造性设计研究开发极其关键。
Interconnect geometric variation extraction is a key factor for the integrated circuit design for manufacturability research and development, under ultra deep sub-micro process nodes.
随着集成电路生产工艺的进展,互连线在集成电路设计中的影响越来越大。
With the development of IC process technology, the impact of interconnects on the design of IC's is becoming greater.
最小几何尺寸、承受力的能力以及互连线间的串扰是设计中主要考虑的问题。
The constraints of minimal microprobe dimension, force withstanding capabilities, and the electrodes crosstalk are the main design issues.
研究了与FPGA通道设计密切相关的互连线长估计技术。
Wire length estimation techniques are studied which is correlated to FPGA routing channel design.
高速低功耗VLSI结构的设计实现以及片内高性能互连线的分析设计是VLSI设计的两个关键领域。
The design and implementation of high speed low power VLSI structure and the analysis and design of high performance on-chip interconnect are two key fields of VLSI design.
在大量仿真数据以及当前集成电路设计工艺的基础上,提出了一种简单互连线负载的有效电容计算模型。
A simple and efficient model was presented for computing the effective capacitance of interconnect load based on simulation and integrated circuit process.
从设计之初就已经注定了失败的结局,有许多东西导致我们无法将其称为真正意义上的游戏平台,或者称其为一款可连线平台,尽管它配备了wi-fi功能。
It was doomed from the very get-go. There are some things which aren't conductive to calling it a true portable gaming platform and calling it a connective platform, although it has wi-fi.
另外,系统的设计采用了异步时序,故减少了芯片的金属连线,减小了芯片面积,降低了产品的生产成本。
Besides, the metal wires and area of the slug are reduced and the production costs are also cut down by using asynchronous sequential circuit.
通过有机地整合连线距离、逻辑关系、类型匹配等诸多因素,并利用生成虚拟仪器软件的逻辑顺序设计了自动连线方法。
The automatic wiring method was designed by integrating wiring distance, logical relation, type matching, etc. and using logical sequence of generated virtual instrument software.
通过有机地整合连线距离、逻辑关系、类型匹配等诸多因素,并利用生成虚拟仪器软件的逻辑顺序设计了自动连线方法。
The automatic wiring method was designed by integrating wiring distance, logical relation, type matching, etc. and using logical sequence of generated virtual instrument software.
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