重点分析了加(减)运算中的进位传输的条件和时间。
It analyse condition and time of carry transmission in the operation add (subtraction).
它之所以称为半加器是因为它只有两个输入，即没有进位输入。
It is called "half-adder" because it has only two inputs and does not provide for a carry input.
加法器是产生数的和的装置。加数和被加数为输入，和数与进位为输出的装置为半加器。
Addend and BeiJiaShu as input, and the device for output with binary for half a gal device.
加法器是产生数的和的装置。加数和被加数为输入，和数与进位为输出的装置为半加器。
Addend and the summand input, and digital and carry the output device is a half adder.
加法器是产生数的和的装置。加数和被加数为输入，和数与进位为输出的装置为半加器。
Addend and the summand input, and digital and carry the output device is a half adder.
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