边界扫描设计已逐渐成为芯片设计中不可或缺的部分，IEEE为其制定了相关标准，即ieee1149.1标准(也称为JTAG标准)。
So the design of boundary scan is essential in the design of chips. IEEE instituted a standard for it, and the standard is IEEE1149.1 (that can be called as JTAG standard also).
本文以usb逻辑分析仪作为一种典型的被测对象，进行了可测性设计的再开发工作，使其具有支持IEEE 1149.1边界扫描功能的设备结构。
This paper chooses USB logic analyzer as a typical tested object, and carries through a second develop to design it supporting IEEE 1149.1 boundary-scan function for testability.
本文概要论及与测试相关的设计特性，详细讨论了不同MCM的边界扫描测试策略。
This paper Outlines the design of features related to test and then details the Boundary Scan test strategies developed for different MCM.
为了解决上述问题，文中提出了两种基于边界扫描技术的板级动态链路设计方法。
To resolve them, two design methods of board level dynamic BS chain based on boundary scan technology are proposed in this paper.
该电路可实现测试、编程功能，并符合IEEE1149.1边界扫描标准的规定，测试结果达到设计要求。
Test results show that the FPGA chip can realize the desired functions of test and programming in accordance with IEEE1149.1 boundary scan standard, and meets the requirement of the design.
该文在研究边界扫描体系结构和TAP接口控制器的基础上，在一个测试系统中，实现了基于JTAG规范的主ta P接口设计。
On the basis of research on the bound ary-scan architecture and TAP controller, the paper implements a design for a t ap interface based on JTAG specification in a test system.
系统级可测性设计主要是将存储器BIST与ARM核的边界扫描测试相结合。
SRAM BIST is also combined with ARM core's boundary scan testing during system level DFT.
在某计算机系统中设计了基于JTAG边界扫描计算机插件或系统在线导通测试系统，这是一个新颖通用的系统。
We have developed a new On-line Connecting Test System based on JTAG boundary scan for computer plug-unit or system.
目前常见的可测试性设计方法主要有改善设计法、结构设计法和边界扫描测试法等几种。
There are some common methods of design for testability, such as boundary scan test and so on.
本文在对目前主要的可测性设计方法进行研究的基础上，根据所设计CPU的结构特点，采用了边界扫描技术和基于BILBO的内建自测试技术结合的可测性设计方案。
Based on the research of primary DFT method and the structure characteristic of designed CPU, the article combines the boundary scan and Build-In Self-Test based on BILBO to test.
基于混合信号边界扫描技术标准，提出混合信号边界扫描控制器的设计方案并实现了其硬件设计，包括边界扫描控制模块、显示驱动模块等。
On the basis of mixed-signal Boundary scan technology, a scheme of mixed-signal Boundary-scan test system is presented and the hardwares are implemented, including the controller and display unit.
为支持板上芯片或逻辑的测试，联合测试行动小组专门设计和定义了一种通用的芯片边界扫描结构及其测试访问端口规范，称为JTAG标准。
Joint test Action Group designed a common chip boundary-scan structure and test access port criterion which is called JTAG standard to support testing on-board chip or logic.
扫描技术和边界扫描技术是目前可测试性设计的主流技术，可分别用来解决芯片内部与芯片之间的可测试性问题。
Scan technique and boundary scan technique are the main stream technology of current DFT technique. They can solve the internal testable problems and the connection problems between ICs respectively.
基于IEEE 1149.1标准的边界扫描技术(BST)作为一种标准化的可测性设计方法，弥补了传统测试的缺陷，为复杂的电路互连提供了测试手段。
As a standard DFT method, IEEE 1149.1 boundary-scan technique (BST) provides measures to complex interconnect test and can well make up the shortcoming of traditional test techniques.
主控器设计是边界扫描测试系统设计的重点。
The design of a BSM is the key problem of the implementation of the Boundary Scanning Test System implementation.
调试结果表明，研制的边界扫描控制器功能正常，符合设计要求，具有即插即用、无需外部供电、连接简单可靠等优点。
After tested, this controller has a correct function, according with design request and has some advantages such as plug and play, doesn't need extern power, easy connection, and so on.
边界扫描技术是一种标准的数字电路测试及可测试性设计方法，它在工业界得到了广泛的应用。
As a standard technique of test and Design-For-Testability for testing the digital printed circuit board, Boundary-Scan technique has obtained widespread application in electronic equipment.
本文设计了一种通用的边界扫描时钟单元。
A general purpose JTAG Boundary-Scan Clock Cell is designed in this paper.
采用DSP和边界扫描总线控制芯片74lvt8980设计边界扫描测试控制器。
A boundary scan controller with the USB interface is designed. DSP and 74lvt8980 are adopted to control the boundary scan bus.
实际应用中，大多数器件没有边界扫描接口，因此本文所介绍的边界扫描技术实现方法对进行数字系统的可测性设计具有一定的参考价值。
Meanwhile, how to control the boundary scan bus is mentioned in this paper. As in usual, most devices have no JTAG test access ports, the techniques discussed in this paper are valu…
实际应用中，大多数器件没有边界扫描接口，因此本文所介绍的边界扫描技术实现方法对进行数字系统的可测性设计具有一定的参考价值。
Meanwhile, how to control the boundary scan bus is mentioned in this paper. As in usual, most devices have no JTAG test access ports, the techniques discussed in this paper are valu…
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