在水下焊接过程中，脉冲电源输出高电平时，停止送丝，电弧稳定燃烧并形成熔滴；
During the welding process, when underwater welding power outputs high level, the system stops feeding wires and wires burn upwards with forming molten droplets.
Sinking数字输出通过三极管来控制连接线上的电平为高电平(+V)或是低电平(0 V)。
The sinking digital output controls the line by using a transistor to leave the line high (at + v) or to ground the line to 0 v.
如果一个标志是要传输时，输出变为高电平后，在时钟的上升沿。
If a mark is to be transmitted, the output goes high after the rising edge of the clock.
为了防止现代的高电平输出，可使用RT100替代调制解调器。
In cases of high modem output levels (or inability to lock) the modem can be replaced by the RT100.
因此，当时钟变为高电平时，IC2产生一个计数输出。
Therefore, when the clock goes high, IC2 produces an output count.
每个解码输出在一个全时钟周期内保持高电平。
这两个器件决定Q 1什么时候导通，从而为输出提供保持时间可调的高电平。
These two components determine when Q1 turns on and thus provide an adjustable hold time for the output to hold high.
接收器输入具有失效保护特性，当输入开路时，可确保逻辑高电平输出。
The receiver input has a fail-safe feature that guarantees a logic-high output if the input is open circuit.
此输出缓冲器可快速地将输出电压切换为低电平和高电平。
The output buffer has ability of switching the output voltage to be low level and high level in high-speed.
在所有故障安全条件下，接收器输出为高电平。
The receiver output will be HIGH for all fail-safe conditions.
该接收器还支持开路、短路和终止(100)输入故障安全，在所有故障安全条件下，接收器输出为高电平。它采用易于进行PCB布局的直通式设计。
The receiver also supports open, shorted and terminated (100) input fail-safe and receiver output will be HIGH for all fail-safe conditions and it has a flow-through design for easy PCB layout.
当选择信号为逻辑高电平（1）时，乘法器510传输反相器504的输出信号给发生器404的输出作为输出信号VOUT。
When the select signal is a logic high (1), multiplexer 510 transmits the output signal of inverter 504 to the output of generator 404 as output signal VOUT.
当选择信号为逻辑高电平（1）时，乘法器510传输反相器504的输出信号给发生器404的输出作为输出信号VOUT。
When the select signal is a logic high (1), multiplexer 510 transmits the output signal of inverter 504 to the output of generator 404 as output signal VOUT.
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