桶形移位器的设计采用了全译码电路结构。
Full-decoder circuit structure is used in Barrel Shifter design.
CPLD用来生成系统各模块所需的译码电路和控制信号。
All conversion circuits and control signals that other modules require are produced by CPLD.
监测电路包括555红外发射电路，放大电路以及频率译码电路。
The observation circuit consists of 555 infrared emitting circuit, amplifying circuit and frequency decoding circuit.
本文采用VHDL语言设计了基于CPLD的计数及LED译码电路。
A counting and LED decoding circuit based on CPLD is designed by VHDL.
此类计数器设计方便，电路简单，译码电路简单，并具有快速自启动特。
These counters have many advantages: easy to design, simple circuit, simple decode and self starting.
电路设计主要包括译码电路设计，人机接口电路设计，AD转换电路设计等。
The circuit design mainly includes interface designs, such as address coding circuit, human-machine, AD converter, etc.
本文介绍的译码电路检测仪，是检测无人机遥控接收机译码电路的专用设备。
The decoder circuit test meter presented in this article is a special device which tests the decoder circuit of a pilotless aircraft.
硬件部分主要由电话机线路、译码电路、解码电路、控制电路等几部分组成。
The hardware is made up of the telephone circuit, decoding circuit and controlling circuit.
译码电路接收测量端模拟信号，转化为7段显示的数字信号，发送到数据锁存器上。
The A/D decoding circuit received simulation signal form measurement port and converted the signals into data signals which displayed by 7-segment, then signals were sent to data latch.
电路包括存储阵列、译码电路、敏感放大器、数据输入输出电路，预充电电路等部分。
The whole circuit includes memory array, decode, sense amplifier, data in - out circuit and pre - charge circuit.
接收器一般由接收电路、放大电路、解调电路、指令译码电路、驱动电路和执行电路几部分组成。
Receiver general by the receiving circuit, amplifier, demodulator circuits, instruction decoder circuit, drive circuit and the implementation of the circuit composed of several parts.
存储器采用六管CMOS存储单元、锁存器型敏感放大器和高速译码电路，以期达到最快的存取时间。
A fast access time is achieved by using six-transistor CMOS memory cell, latched sense amplifier, and high-speed decoder circuit.
计数器译码电路：计数译码集成在一块芯片上，计单位时间内脉冲个数，把十进制计数器计数结果译成BCD码；
The decipher circuit of the counter : Count deciphers and integrate on the chip together, count the pulse number in unit time, count the result of the decimal counter to translate into BCD yard;
本文介绍一种按规则序列设计的移位型计数器。此类计数器设计方便，电路简单，译码电路简单，并具有快速自启动特性。
In this paper, it introduces one kind of shift counters designed with regular sequences. These counters have many advantages: easy to design, simple circuit, simple decode and self starting.
采用耐高温的锁定型霍尔元件和钐钴永磁转子分别构成位置与速度传感器，并设计相应的速度信号倍频电路与位置信号译码电路。
Fireresistant Hall device and SmCo rotor is used to design position and speed sensor, and the corresponding doubling circuit and decoding circuit is designed.
本系统由80C196KB／KC单片机、27C64存贮器、光学编码器及外部译码电路、电机驱动电路、限流电路、直流伺服电机等组成。
The system consists of 80C196KB/KC single chip microcomputer, 27C64 memory, optical coder and its external decode circuit, motor drive circuit, current - limiting circuit, DC servo motor etc.
并将脉冲宽度信号送至SD-M - 3002专用电路完成计数、译码、脉冲分配等控制。
And pulse width signal is sent to SD-M-3002 special circuit, to complete such controls as counting, decoding, pulse distribution, etc.
本文还具体给出了译码恢复后纠单个错的电路。
This paper gives a circuit of correcting single error after decoding recover.
应用锁相环集成电路ne567对音频信号的鉴相原理实现对控制信号的译码输出，控制井下仪器马达工作。
The latch phase circle circuit NE567 functions as phase demodulation of audio frequency signals for realizing decoding output of the control signals to control the downhole motor operations.
该逻辑电路具有判断智能，若配置译码显示器、ADC和DAC电路，就能构成高精度的控制器。
The circuit is of judgement intelligence, and can be made of high - precision controller if the decoding display device, ADC and DAC circuits ate added.
检测仪器除了恒流源外，主要还有温度补偿、脉冲形成、脉宽鉴别以及编码、译码等电路。
In addition to the current source, the detecting instrument mainly contains the circuits for temperature compensation, pulse formation, pulse duration discrimination and encode, decode.
七段显示译码器是数字电路中的重要部件，其设计多年来采用传统方法。
The Seven-Segment Decoders are important elements of digital circuits. Designing it has used traditional method for many years.
介绍了我们研制的交错码的编译码器电路及实验结果。
Circuitry of interlaced encoder and decoder and some experimental results are then given.
在论文中，详细介绍了编译码器的整体方案、硬件电路和软件功能的设计。
The scheme of the apparatus, the electro circuit design, and the software design is introduced in the dissertation subsequently.
其中包括地址缓冲、译码器、存储单元、灵敏放大器和输出缓冲电路。
The crucial path includes address buffer, decoder, memory unit, sense amplifier and output buffer.
介绍了CAN总线适配卡的接口电路和译码逻辑。
In this paper, the hardware interface and decode logic of CAN adapter are introduced.
介绍用LED发光二极管组成数码显示的一种编码方法，并介绍了译码驱动电路及与单片机的接口。
This paper introduces a coding method of using LEDs to constitute digital display of Numbers. The related driving circuits and their interfaces with Micro-controllers are also introduced.
由于其运算矩阵为稀疏矩阵，可用稀疏矩阵算法对译码进一步简化，使译码算法的集成电路实现容易。
Because the matrix is a sparse matrix, the decoding can be simplified and its implementation by VISL can become easy.
本文介绍了数字电路系统的逻辑设计过程，并且着重阐明异步计数器和译码器的功能，数字钟是这方面应用的一个实例。
This paper introduces the process of logic design of digital circuits, and mainly explains the function of asynchronous counter and decoder. The digital clock is an example of this application.
指令译码器将编码指令信号进行译码，最后由驱动电路来驱动执行电路实现各种指令的操作。
Encoding instruction decoder for decoding command signals, and finally by the drive circuit to drive the implementation of circuit operation to achieve a variety of commands.
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