设计了二进制树型拓扑结构传播统一的系统时钟和触发信号，采用CPLD提供传感器间的精确时序和同步。
A binary tree routing topology is designed for propagating the system clock and trigger signal and the accurate timing and synchronization between sensors are provided by CPLD.
针对随机脉冲信号采集中的触发信号获取问题设计了一种快速触发检测系统。
Focused on the problem of getting the trigger in random pulse signal data acquisition, a rapid trigger detection system was designed.
本文利用VHDL硬件描述语言设计了一种SVPWM信号发生器，该信号发生器不仅成功实现了输入时间信号到SVPWM触发信号的转换，而且具有良好的抗干扰能力。
In this paper, a SVPWM signal generator is designed with VHDL. This signal generator can transform time signal into SVPWM trigger signal successfully with good anti-jamming capability.
本文利用VHDL硬件描述语言设计了一种SVPWM信号发生器，该信号发生器不仅成功实现了输入时间信号到SVPWM触发信号的转换，而且具有良好的抗干扰能力。
In this paper, a SVPWM signal generator is designed with VHDL. This signal generator can transform time signal into SVPWM trigger signal successfully with good anti-jamming capability.
应用推荐