首先，Intel必须改变芯片设计方法。
这种芯片设计能产生比POWER 6还要高的性能。
This chip design results in increased performance when compared to POWER6.
在电脑芯片设计，生物学，网络学等方面有相当多的图表应用。
Graphs have many possible applications in computer chip design, biology, networks, etc.
今天世界上的多数计算机芯片部分是被其他计算机芯片设计出来的。
Most computer chips in the world today are designed in part by other computer chips.
介绍了一种使用CPLD芯片设计LCD控制器的方法。
This paper introduces the method of designing LCD controller with CPLD chip.
这篇文章指出，软件也在一直替代芯片设计工程师的工作。
As the article points out, software has also been replacing engineers in such tasks as chip design.
讨论了一种基于红外电视法的眼动信号测量系统及其芯片设计。
A measuring system for the eye movement signal based on the infrared TV method and its IC design are discussed.
POWER 5芯片设计用于非常高频率的操作，最高可达2.0GHz。
The POWER5 chip has been designed for very high frequency operations of up to 2.0 GHz.
本文应用常见的几种芯片设计并实现了液位系统的控制及显示功能。
In this paper, present the design for controller and display function of liquid position control system with some kind of common chips.
提出一种隔行到逐行自适应帧频提升算法和该算法的芯片设计方法。
A new adaptive frame rate up conversion algorithm and its ASIC design for consumer television are presented.
媒体处理器IP核重用成为可编程媒体系统芯片设计的重点和难点。
The reuse of multimedia processor IP core is the key and difficulty of programmable media SOC design.
关于上周在芯片设计商ARM和微软之间宣布的协议的实质含义仍然有不少猜测。
There is a lot of speculation about what the agreement announced last week between chip designer ARM and Microsoft actually means.
如何选择合适的元件来实现系统芯片设计是目前面临的重大难题之一。
How to select appropriate components to implement the design of the SOC is a difficult problem to solve.
一家美国芯片设计商，在槟榔屿拥有新设备和一千一百名工人，其中八百人是工程师。
An American chip-designer, Altera, has a new facility with 1, 100 workers in Penang, 800 of them engineers.
乱序执行是密码芯片设计中一种低冗余、低功耗的抵抗功耗分析攻击的方法。
The random order execution which used in cryptographic ICs is a kind of few redundancy and low power countermeasures against power analysis attacks.
然而，ARM刚刚发布了可以使其产品进入Intel领地-服务器和网络设备的新芯片设计。
Yet ARM just unveiled new chip designs that could carry its products into servers and networking equipment - Intel's turf.
随着市场压力逐渐增大，设计验证的效率已经成为芯片设计领域中关注的焦点之一。
With the gradual increase of pressure from market, the efficiency of design verification has become one of hot points in the chip design area.
使用新型芯片设计了一个J2A音频播放器，并给出了它的软、硬件设计的全部细节。
Use a new chip to design J2A Audio Player and give the complete detail of the software and hardware designs.
不是因为有些产品的开发还不能敏捷实践，我就在硬件项目中用过敏捷方法，包括芯片设计项目。
Not because there are products that are not ready to use agile practices. I’ve even used agile approaches on hardware products, including chip design.
基于RS- 485芯片设计了武器系统的通信网络，实现了武器系统的高可靠通信。
The communication network of weapon system based on RS-485 is designed. Realizes the high credible communication.
介绍了应用ambe- 2000TM声码器芯片设计的语音通信系统的具体实现方案。
This paper introduces the design of a voice communication system based on the AMBE-2000TM vocoder chip.
其核心思想是将计算机网络技术移植到芯片设计中来，从体系结构上彻底解决总线架构带来的问题。
The core idea is to transplant the knowledge of network technology of computer into the design of chips such that systematically solves the problems due to bus architecture.
验证测试担负着检测芯片设计和检验测试程序正确性的双重任务，是芯片开发中不可或缺的重要环节。
The validation test has been a necessary and important process, which assumes the double task in checking the correctness of both the design and test programs.
功能寄存器的设计及使用是芯片设计的关键，必须正确设置各个功能寄存器的值，才能完成设计要求。
The key of the chip-design is the designing and using of the function register, so we must set the right figure of each function register to achieve the design-aim.
因为193 nm液浸式光刻技术与双重成像的结合将迫使芯片产商对芯片设计准则设置更多的限制。
Using 193-nm with double patterning will force chip makers to use "more restrictive design rules," he said.
可测试性设计是现代芯片设计中的关键环节，针对无线接入芯片的可测试性设计对测试技术有更高的要求。
Design for test is an important process in the chip design nowadays, testability design of wireless chip needs a much higher requirement of test technology.
采用这种方法，不仅可以验证处理器芯片设计的正确性，减少错误存在的可能性，而且缩短了芯片验证的时间。
Adopting this methodology, it can not only verify the correctness of the chip and reduce the possibility of the errors in the chip, but also shorten the co-verification time.
采用这种方法，不仅可以验证处理器芯片设计的正确性，减少错误存在的可能性，而且缩短了芯片验证的时间。
Adopting this methodology, it can not only verify the correctness of the chip and reduce the possibility of the errors in the chip, but also shorten the co-verification time.
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