下图是在RAM中的线性地址映射。
The following diagram illustrates the mapping of linear addresses to ram.
分页部件将线性地址转换为物理地址。
The paging unit translates linear addresses into physical ones.
为了加快微处理器中线性地址向物理地址转换的速度，提出了一种高速tlb结构。
A new high-speed TLB architecture is designed for accelerating the address transition rate from linear address to physical one in micro processors.
位的应用程序可以直接访问4eb的虚拟内存，IntelItanium处理器提供了连续的线性地址空间。
A 64-bit application can directly access 4 exabytes of virtual memory, and the Intel Itanium processor provides a contiguous linear address space.
位的应用程序可以直接访问4eb的虚拟内存，IntelItanium处理器提供了连续的线性地址空间。
A 64-bit application can directly access 4 exabytes of virtual memory, and the Intel Itanium processor provides a contiguous linear address space.
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