在数字信号处理方面提出一种级联信号处理器的FPGA实现方案，用以取代昂贵的专用数字处理芯片。
A scheme of cascade signal processor with FPGA is proposed in digital signal processing, which can be in steady of expensive dedicated digital signal processor.
本文提出用离散余弦变换(DCT)处理器级联一个权重网络实现O -QAM系统的新方案。
In this paper, a new scheme to realize O-QAM system by means of cascading a discrete cosine transformer (DCT) and a weighting network is presented.
调制器输出由三个级联的有限脉冲响应（FIR）滤波器及后置的一个用户可编程后处理器处理。
The output of the modulator is processed by three cascaded finite impulse response (FIR) filters, followed by a user-programmable post processor.
根据单元级联多电平变换器拓扑结构及其脉宽调制技术的特点，以数字信号处理器和复杂可编程逻辑器件为核心，设计了多电平变换器的控制器。
On the basis of topology of cascaded multilevel convertor and its PWM technique, designed the controller of multilevel convertor at the core of DSP and CPLD.
根据单元级联多电平变换器拓扑结构及其脉宽调制技术的特点，以数字信号处理器和复杂可编程逻辑器件为核心，设计了多电平变换器的控制器。
On the basis of topology of cascaded multilevel convertor and its PWM technique, designed the controller of multilevel convertor at the core of DSP and CPLD.
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