使用VHDL语言分别实现了扩展汉明码检错纠错电路与TMR检错纠错电路。
Using VHDL we achieve the Error Detection and Correction circuits which are respectively based on extended hamming code and TMR.
该器件内置一个高速18位采样ADC、一个内部转换时钟、一个内部基准电压缓冲、纠错电路，以及串行和并行系统接口。
The part contains a high-speed 18-bit samplingADC, an internal conversion clock, an internal reference buffer, error correction circuits, and both serial and parallel system interface ports.
它内置一个16位高速采样adc、一个内部转换时钟、一个内部基准电压源(和缓冲)、纠错电路，以及串行和并行系统接口端口。
It contains a high speed 16-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and both serial and parallel system interface ports.
本文研究数字音频无线传输中的前向纠错（FEC）算法和电路 的设计及实现。
This dissertation researches the arithmetic and the circuit implementation of Forward Error Correction (FEC) in digital audio wireless transmission.
另外还在数字编码电路中加入了纠错设计。
In addition, I also add the correction consideration in the digital encoding circuit.
电路微电脑芯片控制，电路自带住处纠错功能，使电路更稳定；
Circuit control with microcomputer chip: The circuit has the function of address correction, which makes it more stable;
根据文中所述的方法，可以快速准确地求出数字通信中常用的循环纠错码及扰码器的并行算法及逻辑表达，并为其它类似数字信号编码问题的电路实现提出了新的解决思路。
We can resolve quickly and accurately the problem of parallel translation of CRC and scrambling by using this method, and offer a new idea for other digital signal code design.
根据文中所述的方法，可以快速准确地求出数字通信中常用的循环纠错码及扰码器的并行算法及逻辑表达，并为其它类似数字信号编码问题的电路实现提出了新的解决思路。
We can resolve quickly and accurately the problem of parallel translation of CRC and scrambling by using this method, and offer a new idea for other digital signal code design.
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