媒体处理器IP核重用成为可编程媒体系统芯片设计的重点和难点。
The reuse of multimedia processor IP core is the key and difficulty of programmable media SOC design.
如何选择合适的元件来实现系统芯片设计是目前面临的重大难题之一。
How to select appropriate components to implement the design of the SOC is a difficult problem to solve.
在系统芯片可测试性设计中考虑功耗优化问题是当前国际上新出现的研究领域。
Considering power optimization in design for testability of system-on-a-chip is a newly emerging research region.
一个ARM系统芯片主板已经表现出了足够的能力来形成集群和处理较大的数据。
An ARM system-on-chip board has demonstrated an enough power to form a cluster and process non-trivial size of data.
本文的主要贡献在于提出了多核系统芯片任务级自动并行化的研究方案和系统实现。
The main contribution of the thesis is to address the issue of automatic task-level parallelization for the architecture of MPSOC and to give the system implementation.
控制系统芯片采用技术成熟，功能强大、价位低廉大众化的AT 89s52单片机。
Control system chip technology is mature, powerful, low-priced mass AT89S52 microcontroller.
文章介绍了基于片上网络对系统芯片进行测试的原理和实例，这是一种新的设计方法。
This paper introduce the SoC testing, based on the new design methodology Network-on-Chip (NoC).
提出一种新的基于嵌入式可重构系统芯片的视频解码方案，采用了软硬件协同验证的方法。
A new video decoding scheme based on embedded reconfigurable SoC is proposed. The software and hardware co-verification method is adopted in this scheme.
应用需求的增长和系统芯片集成度的不断提高，对系统芯片片上互连结构提出了更高的要求。
Higher performance of the on-chip interconnection is needed because of the improvement of the system-on-chip integration and application requirements.
此外，系统芯片存储容量通常有限，SOC的RTOS比通常的嵌入式要求有更小的存储空间。
Furthermore, the memory size of the SOC is small even compared to the embedded systems. The foot-print of the SOC-based RTOS should be smaller than the embedded systems.
本文围绕媒体处理器IP核在媒体系统芯片中的重用，对数据通路设计及控制信息通信机制进行研究。
The paper studies the design of data paths and the communication mechanism of control information, focusing on the reuse of media processor IP core in media SOC.
高性能的系统芯片对数据存取速度有了更严格的要求，同时低功耗设计已成为VLSI的研究热点和挑战。
The access time is important for the system chip with high performance, the low power has been the spotlight and challenge in VLSI design.
概述穿戴式医疗系统芯片的基本组成和工作原理，对适用于穿戴式医疗芯片的无线通信技术标准进行讨论。
The basic structure and principles of wearable medical system on chip were introduced and the performance of different wireless communication standards for wearable medical chip was summarized.
正是由于多媒体系统芯片结构的复杂以及采用了先进的半导体制造工艺，给芯片的实现和验证带来了困难。
The implementation and verification of media SoC are difficult because of its complicated architecture and advanced fabricated technology.
相比于传统的架构，片上网络可扩展性高，充分利用各处理器的并行处理能力，极大提高了系统芯片的性能。
Compared with traditional architectures, on-chip network's scalability and capability of full use of processor's parallel processing improve the performance of SoC.
首先我们针对系统芯片的选型确定了整个系统所需要用到的电源，并设计出能够满足我们各类芯片的电压输出。
Firstly, we conform the power supply of the system by types of chips, and design the circuit of power supply to satisfy needs of all types of chips.
该B CM 7405是一种高性能，高清晰度(HD)卫星，有线和IP机顶盒的DVR系统芯片的解决方案。
The BCM7405 is a high-performance, high definition (HD) satellite, cable, and IP set-top box DVR System-on-Chip solution.
主处理器是一个 180MHzAtmelAT91RM9200 系统芯片（system-on-chip）。
The main processor is a 180MHz Atmel AT91RM9200 system-on-chip.
媒体处理系统结构根据其实现方式的不同，可划分为两种体系结构：专用集成电路媒体处理系统芯片和可编程媒体处理系统芯片。
The architecture of media processing SoC could be failed into two classes based on its implementation method: ASIC's and programmable ones.
随着集成电路工艺的飞速发展，人们已经可以将原先的板级系统集成在一块芯片上，系统芯片逐渐成为集成电路设计的主流发展趋势。
With the development of semiconductor process technology a system on a PCB (Printed Circuit Board) which is composed of several ICs can be integrated into a chip.
测试调度是系统芯片测试的一个重要方面，它用于确定把芯片上芯核的测试集分配给测试存取机制的方法，以使得总的测试时间最少。
Test scheduling determines an assignment of cores to test access mechanism such that the overall test application time of system on chip (SOC) is minimized.
本论文的主要工作即着重于系统芯片中片上总线结构的性能评价研究，包括总线结构的建模、系统仿真环境的建立以及性能评价的方法。
This paper focuses on performance estimation of the embedded microprocessor based on the on-chip bus, including on-chip bus modeling, high-level simulation environment building and their combination.
同时从ARM体系，我们也可以看到RISC在嵌入式处理器领域的优势所在，以及它们将来必然在SOC(系统芯片)中获得广泛应用。
From the ARM Architecture, we could see that RISC has so many merits in embedded systems. And in the new trend, embedded processors will be widely used in SOC (system On Chip).
该仪器以最新的片上系统芯片FPSLIC为核心处理器，以RTX51为嵌入式操作系统，采用大屏幕液晶显示，实现了多路高速数字信号的逻辑分析。
This instrument uses System on Chip FPSLIC as its core processor, RTX51 as embedded systems and large LCD as displaying, which can analyse many channels logic signals.
通过视频同步信号发生器的设计实例，详细描述了基于VHDL进行系统芯片设计方法的应用过程，并进一步讨论了在实际应用中VHDL程序设计的优化问题和应用技巧。
Through the example of video synchronous signal generator the design process of system on chip is particularly described. Moreover the optimization of system and VHDL programming skill is discussed.
这一系统使用功能强大的微芯片来把大量数据压缩到CD-ROM上。
This system uses powerful microchips to compress huge amounts of data onto a CD-ROM.
在对象访问速度，内存利用率和Java芯片系统复杂度之间合理折衷。
A perfect tradeoff will be gained among the object accessing performance, the memory utilization and the Java chip system simplicity.
乌拉圭关于养牛有着通过微型芯片跟踪的系统，其花费为每头牛20美元。
Uruguay has a microchipping system for cattle, which costs $20 a head.
“你所做的一切正是将(一台计算机)系统集成在单个芯片上”他说。
"All that you're doing is reducing (a computer) system to a single chip," he said.
最终的成果是一个基于英特尔4004微处理器的四芯片系统。
The result was a four-chip system, based around the Intel 4004 microprocessor.
应用推荐