全部电路由硬件描述语言实现，可以集成在一片CPLD或FPGA芯片内部，用于数字通信系统接收端的帧同步和定时。
All circuits are designed by HDL and can be intergrated in one CPLD or FPGA chip, used in the frame synchronization and timing of digital communications receiver.
本设计运用MATLAB语言实现信号预测模型的自适应仿真在有源滤波系统的谐波和无功电流补偿中的应用。
Using the MATLAB, this paper introduces an application in harmonics and reactive-current compensation for an active filter system, which based on the adaptive simulink in signal prediction.
利用双核芯片DSC21构成图像处理系统，阐述了硬件组成和图像增强算法，并将该算法在DSC21上用C语言实现。
A image processing system is formed by double-core DSC21 chip. Its hardware composing and image intensifying arithmetic have been described, and the intensifying arithmetic is realized in DSC21 chip.
论述了如何用JDL语言实现现有作业管理系统中的作业定义和作业调度功能，并对该语言在未来的作业管理系统中的应用以及由此带来的优点进行了论述。
Discussed how to use JDL to implement job definition and job scheduling functions in current JMS and how to use JDL in a future JMS and the advantages brought by using of JDL.
论述了如何用JDL语言实现现有作业管理系统中的作业定义和作业调度功能，并对该语言在未来的作业管理系统中的应用以及由此带来的优点进行了论述。
Discussed how to use JDL to implement job definition and job scheduling functions in current JMS and how to use JDL in a future JMS and the advantages brought by using of JDL.
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