缓冲存储器周期的一部分，在这期间，逻辑与算术运算器必须中止操作或不能与存储器传输信息。
A portion of the buffer cycle in which the logic or arithmetic unit must cease operation or neither will be able to communicate with the memory unit.
计算机中，解释并执行指令的一种功能单元。注：处理器至少包含有一个指令控制器和一个算术与逻辑运算器。
In a computer, a functional unit that interprets and executes instructions. Note: a processor consists of at least an instruction control unit and an arithmetic and logic unit.
算术逻辑运算器：执行运算功能的中央处理器内的线路。
ALU: arithmetic Logic Unit; the circuitry within the CPU which performs all arithmetic functions.
运算器：运算器是数据加工处理部件，它是由算术逻辑单元(alu)、累加器、数据缓冲器等组成。
Arithmetic unit: arithmetic unit is a data processing unit that consists of arithmetic logic unit (ALU), accumulator, data buffer, ect.
计算机包括五个基本部分：输入设备、存储器、算术逻辑运算器、控制器和输出设备。
The computers contains 5 basic sections:input , memory, arithmetic and logic, control, and output.
计算机包括五个基本部分：输入设备、存储器、算术逻辑运算器、控制器和输出设备。
The computers contains 5 basic sections:input , memory, arithmetic and logic, control, and output.
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