在VLSI设计上实现了模乘和求逆运算的硬件复用，大幅度地降低了成本。
In VLSI design, the hardware reuse technique is employed to save area costs.
为实现胚胎电子系统的故障修复与硬件复用等功能，设计了支持动态重构的配置控制电路。
Dynamic reconfiguration controller was designed to implement the fault-repairing and hardware-reuse of embryonic systems.
硬件设计部分主要完成了数据的接收、传输流的解析和解复用功能。
The hardware design mainly completes the data receiving and TS demultiplexing and filtering.
传统的全能专家测试环境由于没有很好的实现软硬件分离，而导致了测试资源的复用性和测试系统可扩展性的降低。
Outmoded test -guru test environment 's low separability between these issues causes a low capacity in the reuse of testing resources and the reassembly of a new test system.
介绍了频分复用(FDM)的基本原理，提出一种适合于实验教学系统的FDM传输系统方案，并实现了实验系统的软硬件。
This paper introduces the fundamentals of FDM, presents a scheme of FDM system applicable to experiment teaching, and implements all software and hardware of this experiment system.
基于IP复用方法实现的硬盘加密卡，是一种用于保障数据存储安全的硬件加密装置。
Hard disk encryption card, which is designed based on the IP reuse in this paper, is a kind of hardware encryption device to ensure storage security.
实现了基于用户环路业务综合的复用的硬件电路部分。
The hardware circuits that are based on subscriber loop integrated service multiplex are also achieved.
本文在深入研究IEEE P 1500标准的基础上，设计并实现了嵌入式核测试复用的测试系统，该系统包括硬件系统和软件系统。
Based on studying IEEE P1500 standard in detail, this paper presents a test system which includes hardware proportion and software proportion for embedded core test reuse.
这种情况下，无论是设备硬件还是网络配置都具有巨大成本优势的稀疏波分复用（CWDM）技术是非常适用的。
So CWDM is quite suitable for MAN with its advantages in cost of hardware and network configuration.
利用双平衡模拟乘法器芯片MC1596，设计了正交复用方案的收发终端，并完成了终端的硬件的具体实现。
Using the MC1596, a monolithic balanced modulator circuit, to design the transmitting and receiving terminal, and complete the realization of the terminal hardwire.
在硬件设计过程中，遇到的问题不是很大，但是在软件的设计中，主要需要解决的问题是单片机端口不够，必须复用。
In the hardware design process, the problem of is not very big, but in the software design, the main problem to be solved is enough to reuse, port.
介绍了SOC设计中的IP核可复用技术、软硬件协同设计技术、SOC验证技术、可测性设计技术以及低功耗设计技术。
The paper introduced the technology of IP Reuse, hardware and software co-design, SOC verification, measurement and low-power design on the SOC design.
通过分时复用关键的运算功能模块，该结构同时可以对两行数据进行处理，硬件的利用率达到100%。
The hardware utilization is speeded up to 100% by processing two independent data streams together using shared arithmetic functional blocks.
这样的好处是运算量少，而且复用了下行的IFFT模块，节省硬件资源。
The advantage is less computing. And reusing the downlink IFFT module can save hardware resource.
这样的好处是运算量少，而且复用了下行的IFFT模块，节省硬件资源。
The advantage is less computing. And reusing the downlink IFFT module can save hardware resource.
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