但是，由于电压测试所使用的故障模型存在局限性，而且测试常常不能全速进行，因此一般来说，电压测试只善于验证电路的功能。
But, because of the weakness of the fault model used and being not able to run at-speed, voltage based testing, generally speaking, is only good at verifying IC's functions.
最后，为了验证全速电流测试的可行性，我们通过利用PSPICE软件对C432电路中的一些故障做了模拟，这些故障包括开路故障、固定故障和冗余故障。
Finally, in order to verify the feasibility of at-speed current testing, by using PSPICE software, some faults were been simulated for C432, which included open fault, stuck fault and redundant fault.
经过算法验证和样片测试，有效值电路设计完全满足设计规格。
It is confirmed that the result of the design meets the specification by the algorithmic verification and test of sample.
超深亚微米工艺下，串扰的出现会导致在电路设计验证、测试阶段出现严重的问题。
Current design trends have shown that crosstalk issues in deep sub-micron can cause severe design validation and test problems.
提出并设计了一种有机电致发光显示器交流电压驱动电路，在验证此电路性能的同时也对有机电致发光显示器在交流驱动下的特性进行了测试。
The relevant test and research show that the AC-driving circuit functions excellently, realizing AC driving and restraining the cross talk, and the lifetime of OLED can be improved greatly.
实验证明，该方法简单有效，是一种可行的模拟及混合电路测试方法。
The experimental results show that it is simple and efficient, thus allowing a feasible-scheme for analog and mixed-signal circuits.
生成器配合集成电路后端设计开发环境，可以对所生成的测试结构版图文件进行检查与验证。
With the help of IC back-end tools, this generator could implement the checking and verifying of the generated test structures layout files.
在ITC'02基准电路上的实验结果验证了基于对平衡测试调度算法的有效性。
Experimental results for two ITC '02 SOC benchmark show that the pair balance-based test scheduling achieves less test time compared to the previous approaches.
为了验证该方法的有效性，本文针对一块以MC 6800为微处理器的电路板进行了测试程序开发。
To verify the approach, we generate the test program for a circuit board based on MC6800 microprocessor.
系统设计下载到FPGA测试电路板上进行了验证。
通过对验证电路的测试，结果表明该设计可满足实际使用的要求。
Through the test circuit, the result shows that the design can be actually used.
针对电路检测时的不同要求和实际情况，研究了测试速度较快、测试成本较低的方法，且该法可用一定的算法在计算机上实现，最后用实例进行了方法验证。
According to the different request and exact conditions while the circuit is tested, the paper studies a faster and lower cost test method, which can be realized on computer through cer...
而对于数模混合芯片等的测试验证，很大一部分工作还是要依赖于昂贵的仪器来完成，或使用大量的集成电路工程师来进行相关模拟芯片的可测性设计，这样既增加了成本和难度。
A large part of the test and validation for digital-analog hybrid chips is to rely on expensive equipment to carry out or design for test through a large number of IC engineers associated to analog.
而对于数模混合芯片等的测试验证，很大一部分工作还是要依赖于昂贵的仪器来完成，或使用大量的集成电路工程师来进行相关模拟芯片的可测性设计，这样既增加了成本和难度。
A large part of the test and validation for digital-analog hybrid chips is to rely on expensive equipment to carry out or design for test through a large number of IC engineers associated to analog.
应用推荐