一第一层间导电接孔形成于且穿过一层间介电层以及一介电蚀刻停止层。
A first interlayer conductive joint hole is formed on and through an interlayer dielectric layer and a dielectric etch stop layer.
该第一平板电极形成于设于该介电蚀刻停止层下的一第二内连接结构之上。
The first plate electrode is formed on a second inner connection structure provided under the dielectric etch stop layer.
该第二平板电极形成于该介电蚀刻停止层上，且大致的与该第一平板电极平行且相重叠。
The second plate electrode is formed above the dielectric etch stop layer, and is approximately in parallel with the first plate electrode, and overlaps the first plate electrode.
可用于电化标示和电深蚀刻操作。
Available for Electro Chemical Marking and Deep-Etching operations.
实验上，我们采用全像微影术、电浆蚀刻以及旋镀铁氟龙的方式来制作试片，并量测该试片的反射频谱和接触角。
We fabricate desired structured surfaces by holographic lithography, plasma etching and Teflon coating. The performance is evaluated by measuring the reflectance spectrum and contact angle.
均匀的蚀刻允许通过简单的各向同性蚀刻来减小电活性构件的临界尺寸的有效方法。
Uniform etching allows for an efficient method of reducing a critical dimension of an electrically active structure by simple isotropic etch.
元件制程：蚀刻，表面钝化，介电材料薄膜。
Device Processing: Etching. Surface passivation; dielectric films.
再通过一种包括蚀刻、掺杂、涂层和敷设电触点等步骤的多步生产流程将硅片制成电池。
Wafers are manufactured into solar cells through a multi-step manufacturing process that includes etching, doping, coating and applying electrical contacts.
再通过一种包括蚀刻、掺杂、涂层和敷设电触点等步骤的多步生产流程将硅片制成电池。
Wafers are manufactured into solar cells through a multi-step manufacturing process that includes etching, doping, coating and applying electrical contacts.
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