同时，利用两级敏感放大器的层次式结构降低数据线的电压幅度，进一步降低了功耗。
In addition, the sense amplifier's hierarchical architecture can be used to reduce the data bus voltage amplitude, which further reduces the power dissipation.
该分布式电源系统采用高频母线形式，原边电路采用双管正激电路，电压前馈控制，后级利用磁放大器精确控制。
The primary circuit has the form of double switch forward of feedforward control, the second circuit used the magnetic amplifier as the post regulator.
在功率输出级采用OCL互补对称功率放大电路，并对该功放电路增加电压负反馈，使得输出的正弦电压信号平滑而稳定。
At the power output, OCL complementally and symmetrical power amplifier is adapted. The output sine voltage becomes smooth and stable by adding voltage-negative-feedback to power amplifier.
最后激励级的跨导放大器将电压线性的转化为电流。
Finally, the transconductance amplifier of the stimulating circuit linearly translates the voltage signal into cu.
列读出级采用新型主从两级放大列读出结构，其中主放大器完成电荷到电压的转换，从放大器驱动输出总线来满足一定的读出速度。
In the design of column readout stage, master and slaver structure has been adapted, where master amplifier converts charge to voltage, and slave amplifier works with standby mode to drive output bus.
在输出级设计时，为了提高效率，采用了推挽共源级放大器作为输出级，输出电压摆幅基本上达到了轨至轨；
When designing output stage, in order to enhance the efficiency, it uses the push-pull common source stage amplifier as the output stage, the output voltage swing basically reached rail-to-rail.
列读出级采用新型主从两级放大列读出结构，其中主放大器完成电荷到电压的转换，从放大器驱动输出总线来满足一定的读出速度。
In the design of column readout stage, master and slaver structure has been adapted, where master amplifier converts charge to voltage, and slave amplifier works wit.
采用位线平衡技术、高速两级敏感放大器及可预置电压的数据输出缓冲，以提高存储器的读写频率。
A fast access time is obtained by utilizing a bit line equalizing technique, a high speed hierarchical sense amplifier and a preset data output buffer.
给出了一种常用两级低电压CMOS运算放大器的输入级、中间增益级及输出级的原理电路图，并阐述其主要工作特性。
The principle figures of input stage middle gain stage and output stage for a usual two stage low-voltage CMOS operational amplifier and their principal performance are presented in the paper.
给出了一种常用两级低电压CMOS运算放大器的输入级、中间增益级及输出级的原理电路图，并阐述其主要工作特性。
The principle figures of input stage middle gain stage and output stage for a usual two stage low-voltage CMOS operational amplifier and their principal performance are presented in the paper.
应用推荐