提出了用硬件描述语言VHDL描述RAID通道适配器模型。
The model of RAID channel adapter de-scribed by VHDL is put forward.
这是一个用硬件描述语言来设计的交通灯程序，和实用，很经济。
This is a hardware description language used to design the traffic light procedures, and practical, it is economic.
阐述了用硬件描述语言设计仲裁逻辑的具体过程，给出了逻辑状态机和转换关系。
The design procedure of arbiter logic by hardware description language and state with transform conditions are also demonstrated.
用硬件描述语言VHDL对可编程器件FPGA进行功能模块设计、仿真综合，可实现VGA控制器显示各种图形、图像、文字等。
The design of functional module and simulation and synthesis based on FPGA by using VHDL can be realized on VGA Controller, which can display the figure, image, character and the like.
用VHDL（甚高速集成电路硬件描述语言）有限状态机设计了数据采集时序的控制电路。
The sequence control circuit of DATA collection is designed with finite state machine(FSM) of VHDL.
用高速的FPGA代替ECL集成电路制作了北京谱仪的主触发电路，其设计过程中使用了硬件描述语言VHDL，得到了和原电路同样的性能，但增加了灵活性。
Master Trigger Controller was made using fast FPGA instead of ECLIC. VHDL was used in its design. The same performance was obtained with increased flexibility. .
用高速的FPGA代替ECL集成电路制作了北京谱仪的主触发电路，其设计过程中使用了硬件描述语言VHDL，得到了和原电路同样的性能，但增加了灵活性。
Master Trigger Controller was made using fast FPGA instead of ECLIC. VHDL was used in its design. The same performance was obtained with increased flexibility. .
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