组单元的模块化设计结构与流水线设计技术使得硬件逻辑资源得到更有效的利用。
With the modularization design and pipeline technology, this architecture makes more efficient using of hardware resources.
该方案利用DCT的行列分离特性，采用流水线设计技术，将二维DCT/IDCT实现转化为两个一维DCT/IDCT实现。
The way adopted pipeline architecture and changed 2-D DCT/IDCT to two 1-D DCT/IDCT based on characteristic of row-column decomposition.
本设计为兼顾模数转换器的速度和精度，采用数字校正技术，以每级1.5 位的9 级流水线结构实现。
The converter has a good tradeoff between conversion speed and conversion precision. It is a 1.5-bit per stage with 9 stage and digital correction technique.
运用流水线技术对单精度浮点乘法和加法运算单元进行了优化设计。
For optimizing floating-point units, a design based on pipeline techniques is described in this paper.
通过采用流水线技术和模块复用等优化设计，可以大大提高译码速度，减少资源消耗。
The design uses pipe-line and module reused technology, thus speeding up the decoding process and reducing the resource consumption significantly.
本文设计的FFT处理器采用流水线和并行处理技术，在64个时钟周期完成64点复数定点FFT运算，可以满足OFDM系统的需要。
The FFT processer adopts the pipeline and parallel technology and can complete 64 points FFT computation in 64 clocks. It is able to meet the need of OFDM system.
公司技术力量雄厚，检测、装配设备精良，并引进了具有先进水平的生产流水线装备，还配备了CAD电脑辅助设计系统。
Strong technical force, testing and assembly equipment well, and with the introduction of advanced production lines and equipment, also equipped with a CAD computer aided design system.
流水线技术是设计高速数字电路的一种最佳选择之一，对其实现原理作了较形象的阐述。
Pipeline technology is one of the optimum approaches to design high speed digital circuits. This paper sets forth the principle of its realization.
第一批用流水线技术设计的微处理器的流水线生产过程要用五步。
The production process of this assemBly line has Been designed with the newest technology.
而流水线技术是现代CPU设计的核心技术，是决定CPU运行效率的关键因素。
Pipeline technology is the kernel technology of modern CPU design. It's the key of the CPU efficiency.
系统设计是在提高实时控制的可靠性和快速性基础上，采用了双单片机的系统结构和流水线查询技术。
For more fast reaction to real time control, the dual MCU structure and streamline inquiring technology are applied.
该文从消除时钟信号冗余跳变而致的无效功耗的要求出发，提出了应用并行技术和流水线技术，实现基于RTL级的双边沿触发计数器的设计。
To erase the bootless power dissipation of the redundant leap of the clock, this paper proposes the RTL design of double edge triggered counter using parallelism and pipeline technique.
文章基于FPGA采用流水线技术和优化设计，提出了一种更高效的AES算法IP核的设计方法。
This paper presents an efficient design of AES algorithm's IP core in FPGA using pipelining technique and optimized methods.
本文的设计着重从多个层次利用并行处理技术来提高环路滤波的速度，包括流水线设计、数据流驱动控制策略以及算法并行性设计。
Our design emphasizes on using parallel processing technology from multi-level to improve speed, including pipelining design, data-flow drive strategy and algorithmic parallelism design.
设备制造技术的提升将在改进服装企业产品设计、工艺再造、流水线安排等关键环节产生重大影响。
The improvement of equipment manufacturing technology will have a impact on enterprise product design, process reengineering and industry chain arrangement.
本文对流水线结构ADC的关键设计技术进行了研究。
This thesis presents the key technologies for pipelined ADCs.
公司技术力量雄厚，检测、装配设备精良，并引进了具有先进水平的生产流水线装备，还配备了CAD电脑辅助设计系统；
Taizhou Lingxiao Pump Industrial Co. Ltd. has powerful technology, precise inspection device and introduced advanced assembly line with CAD system.
基于流水线技术和并行技术的硬件设计保证了该算法的实时实现。
Based on pipeline and parallelism technology, the processor can run in real-time.
FPGA在分布式计算、并行处理、流水线结构上有独特的优势，自然成为设计软件无线电系统的首选技术之一。
FPGA has become the first choice for designing the software radio system because of its unique advantages in distributed computing, parallel processing and pipelining.
由于整个设计采用流水线技术，所以处理速度极快，这也为将来处理更高分辨率的图像数据奠定了硬件实现的基础。
It works fast as for the pipeline tech, which lays foundation for the processing of image data with higher resolution.
用八位全加器的工作，说明了流水线技术在PLD设计中的应用。
We gave logic device of the 8bit full-adder of flow work. Introduce apple of the flow work on PLD design.
用八位全加器的工作，说明了流水线技术在PLD设计中的应用。
We gave logic device of the 8bit full-adder of flow work. Introduce apple of the flow work on PLD design.
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