算法的硬件结构由模乘控制器、模幂控制器、数据寄存器和模乘运算单元构成。

The hardware architecture is made up of modular controller, modular exponentiation controller, data register, and modular multiplication operation units.

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实验结果表明，该有限域模乘指令和硬件运算单元具有较高的执行效率和较好的灵活性。

Experimental results show that, the modular multiplication instruction and hardware unit presented in this paper can achieve high performance and guarantee high flexibility.

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实验结果表明，该有限域模乘指令和硬件运算单元具有较高的执行效率和较好的灵活性。

Experimental results show that, the modular multiplication instruction and hardware unit presented in this paper can achieve high performance and guarantee high flexibility.

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