过滤器逻辑结构的模块化特别适宜用标准单元法来实现ASIC(专用集成电路)的版图设计。
The modularization of filter logical architecture is especially suitable for layout design of ASIC with standard cell.
今天的专用集成电路通常用“标准单元”方法来设计。
Today 's ASICs are usually designed with a Standard Cell approach.
采用标准单元方法的集成电路设计系统是一个用于专用集成电路(ASIC)设计的自动布图系统。
This IC design system applicable to the standard cell method is an automatic layout system used for designing Application Specific ICs (ASIC).
对MCNC标准单元测试电路中组合和时序电路的实验结果显示， 电路经过时延驱动优化布局后的最大路径时延最多减少了31%。
MCNC(microelectronics centre of north-carolina) standard cell benchmarks are experimented and the results show that the algorithm can make the longest path delay improvement up to 31%.
标准单元库作为数字电路设计的基础，其性能的改善对整体电路性能的提高有着十分重要的作用。
As the foundation of modern digital circuit design, the Standard Cell library and its performance improvement has tremendous effect on the capability of digital circuit.
标准单元库作为数字电路设计的基础，其性能的改善对整体电路性能的提高有着十分重要的作用。
As the foundation of modern digital circuit design, the Standard Cell library and its performance improvement has tremendous effect on the capability of digital circuit.
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