门阵列和标准单元是两种主要方法。
哪些因素可以影响标准单元的延迟？
What are several factors to improve propagation delay of standard cell?
同意类型的标准单元避免宽度变化过大。
Avoid creating standard cells of the same type that vary greatly in width.
测试项目中包含一个可以删除的标准单元测试。
The test project contains a standard unit test, which you can delete.
今天的专用集成电路通常用“标准单元”方法来设计。
Today 's ASICs are usually designed with a Standard Cell approach.
下面的图展示了LEF标准单元和形状类似的布局数据。
The following figure shows a LEF standard cell with shapes similar to layout data.
以上这些都对标准单元库的设计和优化产生了重要影响。
All these above are major concerns in standard cell library design and optimization.
实验结果表明，这种标准单元库能够很好地起到防d PA攻击的作用。
The experimental results demonstrate that the DPA-resistant standard cell library can counteract DPA attacks effectively.
Sims大多使用那些设备来校准齐纳电压参考，也校准电压标准单元。
Sims USES those setups mostly to calibrate Zener voltage references, but she also calibrates voltage standard cells.
此技术可以有效地应用于其他CMOS或SOI工艺标准单元库的开发。
The flow technology can be effectively applied to standard library development of other CMOS and SOI processes.
后面的迭代更加促进了构建子系统集成，是实际系统或模型则依赖于标准单元的个数。
Subsequent iterations further the building of sub-assemblies in reality or through models, depending upon the number of standard elements.
本文提出在ASIC综合技术中基于标准单元库的多级逻辑函数分解技术。
The decomposition of multilevel logic functions based on standard cell libraries used in ASIC synthesis is presented in the paper.
提出了一种对基于标准单元芯片计算其电源线网的静态电压降的分析方法。
Then the circuit network is generated using resistance interconnect model and standard cell equivalent current model.
该方法实现译码器的标准单元化设计，并且有效提高译码的速度，简化硬件设计。
The implementation carries out the standard-cell design of RS decoder, improves the velocity of decoding efficiently and simplifies the hard - ware design.
本文对标准单元库功能测试模块的设计要求进行了全面的分析，提出整体设计方案。
In this paper, it poses a comprehensive analyse on the standard cell library functional test module requirements and propose a design plan.
提出了一种无需外部时钟、可以部分抵消工艺偏差、基于标准单元的延迟环A/D变换器。
A non-clock delay-ring A/D converter is presented, which is based on standard cell library and not sensitive to process variation.
过滤器逻辑结构的模块化特别适宜用标准单元法来实现ASIC(专用集成电路)的版图设计。
The modularization of filter logical architecture is especially suitable for layout design of ASIC with standard cell.
标准单元库作为数字电路设计的基础，其性能的改善对整体电路性能的提高有着十分重要的作用。
As the foundation of modern digital circuit design, the Standard Cell library and its performance improvement has tremendous effect on the capability of digital circuit.
一般来说，在你的单元库中相同类型的最大宽度标准单元不应超过最小标准单元宽度的5到6倍。
In general, the width of the largest standard cells should be no more than five or six times the width of smallest standard cell of the same type in your library.
采用标准单元方法的集成电路设计系统是一个用于专用集成电路(ASIC)设计的自动布图系统。
This IC design system applicable to the standard cell method is an automatic layout system used for designing Application Specific ICs (ASIC).
使用的标准单元类型具有较大程度的相似性，有利于基于标准单元布局布线软件进一步减少芯片面积。
Cells used in the circuit have much similarity, which helps further reduction of chip areas in the layout procedure based on standard cells.
主要改进了标准单元库中版图库的建库技术，接着结合与门版图设计实例详细讲解了这些建库技术的应用。
The emphasis is improving creating library technology in layout library, such as optimizing cell widths and optimizing cell heights , furthermore, optimizing routing.
哪些因素在推动着FPGA技术的普及，以至于FPGA在许多应用中正在替代门阵列和标准单元asic ？
What's fueling the popularity of FPGA technology to the point that it's now replacing both gate array and standard-cell ASICs in many applications?
并且可以通过简单地改变标准单元之间的散热片的厚度，从而改变激光器列阵的散热能力，控制不同的占空比因子。
Additionally, by simply changing the thickness of radiator between the standard array units can change the radiating capacity of the LDs array, and control the factors of different duty ratios.
本文采用通用的数字ASIC设计流程，在仅使用已有标准单元的情况下，提出了一种新的基于FIFO的异步包装。
A new FIFO-based asynchronous wrapper was proposed, which implemented using only standard cell and optimized in a standard digital ASIC flow.
全套引进德国豪迈（HOMAG）的专业生产设备，以标准单元产品的设计形成规模化生产，年产厨柜可达60000套。
We imported the German HOMAG professional equipment and form large scaled manufacture according to design of the standard unit products, the annual capacity of the kitchen cabinet reaches 6000 sets.
对MCNC标准单元测试电路中组合和时序电路的实验结果显示， 电路经过时延驱动优化布局后的最大路径时延最多减少了31%。
MCNC(microelectronics centre of north-carolina) standard cell benchmarks are experimented and the results show that the algorithm can make the longest path delay improvement up to 31%.
对MCNC标准单元测试电路中组合和时序电路的实验结果显示， 电路经过时延驱动优化布局后的最大路径时延最多减少了31%。
MCNC(microelectronics centre of north-carolina) standard cell benchmarks are experimented and the results show that the algorithm can make the longest path delay improvement up to 31%.
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