采用高精度时钟芯片。
介绍了一种通用串行接口时钟芯片的设计方法。
The article introduces a design method of a general serial interface clock chip.
本文讨论了一种低功耗时钟芯片的设计与实现。
This paper discusses the design and implementation of a low-power digital clock chip.
本文介绍了DS1302日历时钟芯片的工作原理和编程方法。
This paper introduces the work principle and program method of DS1302 trickle charge timekeeping chip.
介绍的显示存储仪以at89c 52微处理器为核心，外加时钟芯片。
This paper introduces a new display memory instrument, in which AT89C52 micro-processor is the core, with a time chip added to it.
二是用专门的时钟芯片实现。然后，对数字钟的稳定性和精确性作了相关的讨论。
Two, realizes with the special clock chip. Then, has made the related discussion to the digital clock stability and the accuracy.
介绍了高精度实时时钟芯片rtc 4553的功能、特点、原理及应用，并给出了电路原理图和控制程序。
The paper introduces the function, the feature, the principle and the application of hige accuracy real time clock chip RTC4553, it gives hardware and software design.
用灵敏的数字温度传感器ds18 B 20完成温度测量，精确的日历时钟芯片P CF 8563作为实时时钟源。
Completes the temperature survey with keen digit temperature sensor DS18B20, precise calendar clock chip PCF8563 takes the real-time clock source.
本文介绍了实时时钟芯片RX-8025的功能及特点，并结合在9S12A64单片机上的应用，给出了具体的程序清单。
This paper introduces the functions and characteristic of RX-8025. Combining the 9S12A64 to the RX-8025 , applied in a specific way, and given concrete procedure list.
采用软件模拟时序使CPU的I/O口模拟I2C总线，实现了单片机与时钟芯片、温湿度传感器、存储芯片等器件的数据交换。
With time series simulation software, the CPU's I/O ports simulate I2C bus and exchange data with clock chips, temperature humidity sensors, memory chips and other devices.
本文介绍了串行时钟芯片DS1302的功能和工作原理，并给出ds1302在灌溉控制器中与AT 89 C51单片机的接口电路设计。
This paper introduces the functions and work principles of serial clock chip DS1302, the design of interface circuit with AT89C51 single -chip microcomputer in the spray irrigation controller.
同时介绍了该分频器各级门的动态特性以及内部用三态门控制结构的优点，给出了平均延迟时间的设计结果，该设计已应用于高频时钟芯片的大批量生产中。
The dynamic performance of the gates and the advantages of internal structure of tri-state gate control are also presented. Results of the averaged time delay design are given. which have bee...
如果你仅仅参照微处理器芯片的时钟速度，你可能会这么想。
If you looked only at the clock speeds of microprocessor chips, you might well think so.
这是因为进程执行现在需要跨总线协调，以一半的芯片时钟频率进行处理。
This is because process execution now needs to be coordinated across the bus, which operates at half the clock frequency of the chip.
电脑芯片的时钟不再那么快了。
多年以来，英特尔通过提高越来越快的时钟频率(以MHz或者GHz计)，持续不断地改进了芯片的性能，但现在撞上了南墙。
For years, Intel has consistently improved the performance of its chips by making them run at higher and higher clock speeds (measured in MHz or GHz). But it has now hit a wall.
按照逻辑芯片设计特点，将芯片工作时的信号分为4种：时钟信号、输入信号、组合输出信号和寄存器输出信号。
According to the logic chip design feature, the chip work's time signal can be divided into 4 kinds: clock signal, input signal, combination output signal and register output signal.
系统采用时钟温度芯片DS18B20，调节温度的及其设计。
The system uses clock temperature chip DS18B20, the attemperation and the design.
设计了一个数字时钟数据恢复电路，采用相位选择锁相环进行相位调整，在不影响系统噪声性能的前提下大大降低了芯片面积。
A phase selection PLL is adopted to adjust the phase of the recovered clock, and the chip area of the recovery circuit is greatly reduced without sacrificing the noise performance of the system.
系统主芯片采用EP1K100 QC 208 - 3，由时钟模块、控制模块、计时模块、数据译码模块、显示以及报时模块组成。
The main system chips used EP1K100QC208-3, make up of the clock module, control module, time module, data decoding module, display and broadcast module.
讨论了TMS320C 5402芯片的时钟电路、电源电路、复位电路等基本硬件电路的设计方法，并给出了接线图。
The article discusses the design method of chip clock circuits, power circuits and complex Spaces circuit for the basic hardware of TMS320C5402 and gives the wiring plans.
这种商用集成芯片可用于本振合成回路，高精度时钟发生器等。
This commercial integrated chip can be used in the local oscillation circuit, high-accuracy clock generator and so on.
将有512个着色器芯片的少数为'分发给新闻界的时钟和公关噱头，但产量不会支持一个真正的产品这一点。
There will be a handful of 512 shader chips at 'full clocks' distributed to the press and for pr stunts, but yields will not support this as a real product.
自启动预载接口芯片以控制为主，时钟关系复杂。时序设计是整个设计的重点和难点。
Interface and download chip is control-oriented and has complex clock relationships, therefore timing design is the key and difficult point.
在区域火灾报警控制器中，FM 31256芯片的非易失性数据存储器、实时时钟、看门狗等功能，增强系统可靠性。
The nonvolatile data memory, real-time clock, and watchdog functions of FM31256 chip were adopted by region fire alarm and control device to improve the system reliability.
用复杂可编程芯片(CPLD)实现，并用于雷达数字光纤通信系统的信道编码，提高了时钟提取的性能。
The scheme can be implemented by using the CPLD chip, and used for the channel coder in a radar digital optic-fiber communication system and improving the features of clock extraction.
芯片测试结果的正确也验证了这种时钟树综合方案的有效性。
The correct test results of the chip also verify the effectiveness of this clock tree synthesis program.
本系统利用集成时钟和数据恢复芯片SY87700L实现了可靠的位同步。
This system select integrate chip SY87700L to realize bit synchronizing reliably .
该系统采用了片同步技术实现了采样后高速数字信号的可靠锁存，采用高精度的时钟管理芯片和设计合理的时钟路径对时钟抖动做了严格控制。
The Chip-Sync technology has been used to ensure the latch of high-speed signal, and we use high accuracy clock management chips and design reasonable clock way to strict control the clock jitter.
时钟树综合是芯片后端设计至关重要的一环，时钟偏差成为限制系统时钟频率的主要因素。
Clock Tree Synthesis is important in the backend-end design of chip design, and the clock skew has become the major part of constraints that limit system clock frequency.
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