研究了组合电路中非鲁棒性路径时滞故障的测试生成算法。
The test generation algorithm for non-robust path delay fault in combinational circuits is studied.
针对数字电路路径时滞故障测试生成较难的问题，提出了基于神经网络的数字电路路径时滞故障测试生成算法。
A path delay fault testing generation algorithm for digital circuits based on neural network is proposed because the testing generation for path delay fault in digital circuits is more difficult.
本文提供了一种使用双倍可变观测点进行时滞测试的方法，保证了只需要测试少量通路就能完成整个电路的时滞测试。
This paper presents an approach to delay testing with duplicating variable observation points, which provides a high path delay fault coverage by testing a small number of paths.
本文提供了一种使用双倍可变观测点进行时滞测试的方法，保证了只需要测试少量通路就能完成整个电路的时滞测试。
This paper presents an approach to delay testing with duplicating variable observation points, which provides a high path delay fault coverage by testing a small number of paths.
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