在时序逻辑设计中，较好地解决了数据的存储、读取和点像元数据连续监测。
Data storage, reading and continuous monitoring of point pixels have been well solved in design of time sequence logic.
通过两个典型例子，介绍了卡诺图应用于同步时序电路的逻辑分析和逻辑设计的方法。
With two concrete examples, this paper discusses the application of Karnaugh figure in synchronous time-sequence logic circuit's analysis and design.
基于FPGA (EP1K100 QC 208)的16位定点复数的快速求模设计及系统时序和控制逻辑设计。
Design the fast calculation of modulus of 16 bit fix-point complex number and time logic of pulse compression system based on FPGA (EP1K100QC208).
PLC编程技术包括：经验设计法，逻辑设计法、时序图设计法、顺序控制设计法等编程方法。
PLC programming technique includes experience design method, logic design method, cycle diagram design method and sequential control design method.
对照数据手册的时序要求优化硬件逻辑设计，解决了双核嵌入式处理器TMS320 VC 5471和USB芯片PDIUSBD12时序不兼容的问题。
We have optimized the hardware logic according to the timing requirement on datasheet, and solved the timing incompatibility between the dual-core processor TMS320VC5471 and the USB chip PDIUSBD12.
对照数据手册的时序要求优化硬件逻辑设计，解决了双核嵌入式处理器TMS320 VC 5471和USB芯片PDIUSBD12时序不兼容的问题。
We have optimized the hardware logic according to the timing requirement on datasheet, and solved the timing incompatibility between the dual-core processor TMS320VC5471 and the USB chip PDIUSBD12.
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