介绍了一种设计同步时序逻辑电路的新方法。
A new method for designing synchronous sequential circuits (SSC's) is described.
本文给出一个时序逻辑电路的多故障测试模拟程序。
This paper presents a multiple fault test simulator for sequential logic circuit. The simulator is implemented in serial-parallel to save memory.
时序逻辑电路中的竞争冒险是电路设计中必须考虑到的重要方面。
The race and hazard in the sequential logic circuit is quite essential and must be considered when designing logic circuit.
这些方法对于正确使用触发器和设计时序逻辑电路有重要应用参考价值。
The methods have useful reference value to using correctly flip-flops and designing sequential logic circuits.
给出了具有实际应用价值的APD信号放大电路和控制时序逻辑电路原理图。
The article offers APD signal amplify circuit chart and controlling time series logic circuit principle chart bearing practical applied...
给出了具有实际应用价值的APD信号放大电路和控制时序逻辑电路原理图。
The article offers APD signal amplify circuit chart and controlling time series logic circuit principle chart bearing practical applied value, which possess some guidance significance...
本文试图把时序逻辑电路和组合逻辑电路的设计，在概念上和方法上统一起来。
In this paper the writer tries to integrate the design of asynchronos counters of arbitrary carry system with the design of combinational logic circuits in concept and method.
移位寄存器是用来寄存二进制数字信息，并能将存储的信息移位的时序逻辑电路。
The shift register is a sequential logical circuit, which can store and shift binary digit information.
CMOS敏感器不是I2C总线电路，因此同arm连接必须有驱动电路(时序逻辑电路)。
When it connects to ARM, driving circuits (sequential logical circuits) is necessary because CMOS star sensor doesn't belong to I2C bus circuits.
这类门电路可以用于构成四值组合逻辑电路和时序逻辑电路，也可以和DYL系列电路配合使用。
This kind of gate circuit can be used in forming 4 value combination logic circuit and order part logic circuit, it also can be combined with DYL series circuits.
用程序实现状态机功能，有限状态机是指输出取决于过去输入部分和当前输入部分的时序逻辑电路。
Finite state machine is refers to the output depends on the past input part and the current input portion of temporal logic circuit.
导出了DT触发器的激励表，提出了应用DT触发器的时序逻辑电路的设计方法，并给出了设计实例。
In this paper, DT flip - flop excitation table is developed, the design method of sequential logic circuits using DT flip - flop is presented, and the design example using the method is given.
有效地建立和表示时序逻辑电路的状态转移关系是应用模型检查方法验证时序逻辑电路的关键技术之一。
Building the transition relation of sequential logic circuit is one of the key technologies for applying model checking method to verify the sequential logic circuit.
主要介绍了用时序逻辑电路实现连续脉冲宽度测量的工作原理，并讨论了采用8031单片机的实现方案。
The principle of using sequential logic circuit and 8031 monolithic computer for realizing continuous pulse duration measure are introduced.
介绍以中规模集成计数器为核心，结合中规模集成组合逻辑器件及少量门电路进行时序逻辑电路设计的方法。
This paper introduces one way to design scheduling logic circuit with medium-scale integrated counter at the core and based on MSI.
本文论述用ROM的存贮阵列构成新颖的组合逻辑电路和时序逻辑电路的基本原理，并给出两个实际的阵列式逻辑电路的设计方法。
This paper review elementary theory for new logic circuit with ROM memory array, and provide design method for two practical array logic circuit.
本文论述用ROM的存贮阵列构成新颖的组合逻辑电路和时序逻辑电路的基本原理，并给出两个实际的阵列式逻辑电路的设计方法。
This paper review elementary theory for new logic circuit with ROM memory array, and provide design method for two practical array logic circuit.
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