本文提出了逻辑法设计时序控制电路的改进方法。
An improvement of logic design approach for time-sequence control circuit is presented.
该控制器是由多种逻辑集成器件构成的典型时序控制电路。
This controller is the typical sequential control circuit which is constituted by many kinds of logical integration component.
本文主要论述了CMOS图像传感器时序控制电路的系统设计和实现方法。
The system design and implementation methods of timing control circuit for a new CMOS image sensor are proposed.
本论文主要论述了CMOS图像传感器时序控制电路的系统设计和实现方法。
The system design and implementation methods of timing control circuit for anew CMOS image sensor are proposed in the paper.
所述存储器装置包括M个正规字线驱动器、虚设字线驱动器、存储器阵列、N个读出放大器和时序控制电路。
The memory device includes M normal word line drivers, a dummy word line driver, a memory array, N sense amplifiers, and a timing control circuit.
用VHDL（甚高速集成电路硬件描述语言）有限状态机设计了数据采集时序的控制电路。
The sequence control circuit of DATA collection is designed with finite state machine(FSM) of VHDL.
该方案将被叠加的字符或图像数据保存在FPGA内部的ROM中，由内部逻辑控制电路产生点阵时序，控制视频通道切换开关，完成叠加功能。
The data of overlapped characters and pictures are stored in the ROM of FPGA, The Times are generated by FPGA inner logic circuit to control the switch of TV channels to finish the overlapping work.
逻辑控制电路由CPLD完成，主要完成整个处理单元的时序和逻辑控制。
Logical control circuit is implemented by CPLD, and its main function is the whole units time sequence and logical control.
其中包括时序逻辑驱动电路、直流偏置电压电路及单芯片焦平面温度控制电路。
The circuit includes a sequential logic drive circuit, a DC bias voltage circuit and a monolithic temperature control circuit for the focal plane array.
其中包括时序逻辑驱动电路、直流偏置电压电路及单芯片焦平面温度控制电路。
The circuit includes a sequential logic drive circuit, a DC bias voltage circuit and a monolithic temperature control circuit for the focal plane array.
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