用时序控制器控制幻方光屏，可获得优美的动态图案。
With a magic square panel controlled by a sequence controller, wonderful dynamic patterns can be displayed.
这种时序控制器在武汉地震台的技术管理应用中，获得了良好的效果。
This controller is applied to the technical management at wuhan seismostation and a good effect is obtained.
该等离子显示设备包括具有多个寻址电极的等离子显示面板，数据驱动器和时序控制器。
The plasma display apparatus includes a plasma display panel having a plurality of address electrodes, a data driver, and a timing controller.
很明显每个任务的时序安排对控制器的一个好的性能是至关紧要的，因此对一个摆的稳定性是有效的。
It is obvious that a correct scheduling of each task is crucial for a good performance of the controller, and hence for an effective pendulum stabilization.
该控制器是由多种逻辑集成器件构成的典型时序控制电路。
This controller is the typical sequential control circuit which is constituted by many kinds of logical integration component.
根据PCI总线操作时序，提出了从设备接口控制器的有限状态机模型。
The FSM model of target PCI bus interface controller is then provided based on PCI bus operation timing.
给出了PCI总线配置空间的设计以及PCI接口控制器中时序状态机的实现。
The design of the PCI bus in the interspaced ordonnance, and the realization of the sequence state machine in the PCI interface controller is given.
要加快和简化模式检测，ISL98003集成了一套先进的测量工具，充分刻画了视频信号和时序，卸载主机微控制器。
To accelerate and simplify mode detection, the ISL98003 integrates a sophisticated set of measurement tools that fully characterizes the video signal and timing, offloading the host microcontroller.
但SDRAM的控制时序和机制较复杂，因此需要设计sdram控制器以提高其读写效率。
While its time sequence and access mechanisms are very complex, it is necessary to design SDRAM controller to improve the efficiency of accessing.
介绍了新型通信控制器的硬件设计，着重描述了通信接口部分，用复杂可编程逻辑器件CPLD解决了CAN 控制器芯片SJA 1000与AT 91RM 9200之间的时序逻辑问题。
The hardware structure is introduced, emphatically the communication interface circuit. The time sequence logic problem between CAN controller chip SJA1000 and AT91RM9200 is solved using the CPLD.
叙述了可编程控制器产生控制时序的方法。
This article also recounted the measure of producing the time series for control.
CIP工艺流程及其智能型的控制点流程、时序要求以及应用可编程序控制器（PC）来实现CIP的逻辑控制。
Technological process of CIP and intelligent CIP technological process of control point. Require of time sequence and appliance of PC to realize logical control of CIP.
用C51程序设置对于控制器的读、写状态的时序，从而实现对于控制器的写指令代码、写数据代码、清屏幕、屏幕滚动功能的操作。
C51 program has been set the schedule of reading and writing status for controller. It can work out some operations of writing instruction code, writing data code, clear screen and roll screen.
给出了一种基于FPGA实现PCI总线目标模块接口控制器的设计方案，用时序状态机来实现总线访问操作复杂的时序。
PCI target interface controller design with FPGA is proposed. And the realization of the complication of the access sequence to the BUS interface controller is expressed by sequence state machine.
通过对控制器控制对象的时序分析，抽象出控制器的行为描述，并划分控制器的状态。
By analyzing the timing of the controlled objection, the controller's behavioral statement can been abstract and its state can been carved up too. Based on it, design the ADC0809's controller.
通过对控制器控制对象的时序分析，抽象出控制器的行为描述，并划分控制器的状态。
By analyzing the timing of the controlled objection, the controller's behavioral statement can been abstract and its state can been carved up too. Based on it, design the ADC0809's controller.
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