在串行数据输入(DI)或输出(DO)时使用的时钟信号。
Used as the synchronization clock when inputting (DI) or outputting (DO)serial data.
在串并转换接收器中,并行数据在字节时钟的作用下并行输出。
In the deserializer, parallel data are clocked out by byte clock.
本控制系统以高性能8位单片机at89c52为核心,结合数据采集电路、信号输出电路、实时时钟电路、系统监控电路组成。
The control system is composed of AT89C52, a high-powered 8-bit microcontroller, data gathering circuit, real time circuit, data output circuit and system watch circuit.
论文中还给出了开关量输入、开关量输出、通信模块、时钟电路、数据存储器、按键电路和频率跟踪电路等各功能模块的选择方法和设计原理。
And the selection and design of switch-in module, switch-out module, communication module, clock module, data storage module, keys module and frequency detecting module are also discussed.
当器件的时钟频率,数据是转向了串行输出齐晖。
When the devices are clocked, data is shifted toward the serial output QH.
时标输出除有常规的时、分和秒号外,还将日历和时钟数据以串行编码方式输出。
The clock and calendar data are also given in series code format as well as the normal output of hour, minute and second time marks.
输出读数据信号的数据时钟出的内存存储单元。
An output read-data signal clocks the data out of the memory storage cells.
每来一个时钟脉冲,N位加法器将频率控制数据m与相位寄存器输出的累加相位数据相加,并将结果送相位寄存器输入端。
Frequency controlled data (m) plus an accumulative phase data output by a phase register in an N-bit adder when a clock pulse comes, the result is sent to the input port of the phase register.
液晶显示屏对输入、输出电压、电流、状态、参数、时钟显示,一目了然,有历史数据记录、查询、输入设置功能。
LCD displays voltage out, current, status, parameter and time. It also has the function of history data recording, searching and imputing set function etc.
它提供一个数据时钟输出(DCO)用于在输出端捕获数据,以及一个帧时钟输出(FCO)用于发送新输出字节信号。
A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided.
它提供一个数据时钟输出(DCO)用于在输出端捕获数据,以及一个帧时钟输出(FCO)用于发送新输出字节信号。
A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided.
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